From patchwork Thu Sep 24 07:17:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313452 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp1117429ilg; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwDw9wdpszkhHvzDlM49ZF3S581nSse6srtxhlt9d0dYVYD6VAMoalslN6Apz3Sxxrq2SLQ X-Received: by 2002:aa7:ce19:: with SMTP id d25mr3152153edv.189.1600931987715; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1600931987; cv=none; d=google.com; s=arc-20160816; b=QcItmVCWWzLYXuNINWPR06QQitVTuzXC7ecBfd7rNAqsWMaKfYShK7djWQEfov1gzA R1jG6ajSs3zUfYnSlQK1GOfGkwo7CNDoYMH6NWZ9XQ8dEg/1DHe26XIu2Z3AYFZhxz5y caRdTIjRd1xFzkET2MSrGTMCKyHw/0AvyAMsNiwOytdN/6x7XzxlB2wkFfkE5+71Dn50 RYaE2Yck0G8OD6PsufZTyBvT+z6S+VGDF9CtNiRb+RXT89wtNxX4kT3NAYmPmJaF+48K kJa4kESrmkkh6yZqaLt/T65VNem/Zc7RysSoaOP0FNDuH7eOmoCnpCYRtptaUzY3sTBF dW9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=UvoPzmUQI7wvJV240fnFDBD82L+8dZdrtEpUIzI43S4=; b=y9DvFOIJwk2Ple7VRId4bwRmAFV7mIvcgM/xEh6emXLcOxX0AfEXVBcrl5kU5uJTC3 uQg1B46fwZuFTvE/x9d/dJRV3O7Qmsbb4+GiBObsSLgiDlbwNK8Md3q5c7fQdp9ek+l3 aP95KSMW9t1KqztvfYig8iLKuhK/kPBPC+lkEI9qg2yLke3EBWH+M/CnPGysF9DJ0En+ pfkmJ063XqMFeGq59Z323naRYP6DiAHl2HdHPM9pYcwp8Hla14Gf4iXNyA3nWb3s37Ch aoXO+vf2U/UpURgAGrAtKe3kyk1KNtl3shUg4N3+3C9wrjrjIQQ5T1oivAvqOLicdDUY Ar8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j19si1394050ejx.272.2020.09.24.00.19.47; Thu, 24 Sep 2020 00:19:47 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727180AbgIXHTo (ORCPT + 6 others); Thu, 24 Sep 2020 03:19:44 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:45674 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727054AbgIXHTl (ORCPT ); Thu, 24 Sep 2020 03:19:41 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id DACED760207721AC7E87; Thu, 24 Sep 2020 15:19:37 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Thu, 24 Sep 2020 15:19:29 +0800 From: Zhen Lei To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Alexey Brodkin" , Vineet Gupta , devicetree , linux-snps-arc , linux-kernel CC: Zhen Lei , Sebastian Hesselbarth , Haoyu Lv , Libin , Kefeng Wang Subject: [PATCH v6 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Date: Thu, 24 Sep 2020 15:17:53 +0800 Message-ID: <20200924071754.4509-6-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> References: <20200924071754.4509-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 ------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 74 ++++++++++++++++++++++ 2 files changed, 74 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f4c6..000000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = ; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000000..1b05d36b5f7b943 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl) + +maintainers: + - Sebastian Hesselbarth + +description: | + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + + The interrupt sources map to the corresponding bits in the interrupt + registers, i.e. + - 0 maps to bit 0 of low interrupts, + - 1 maps to bit 1 of low interrupts, + - 32 maps to bit 0 of high interrupts, + - 33 maps to bit 1 of high interrupts, + - (optional) fast interrupts start at 64. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: snps,dw-apb-ictl + + interrupt-controller: true + + reg: + description: | + Physical base address of the controller and length of memory mapped + region starting with ENABLE_LOW register. + maxItems: 1 + + interrupts: + description: Interrupt reference to primary interrupt controller. + maxItems: 1 + + "#interrupt-cells": + description: Number of cells to encode an interrupt-specifier. + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + /* dw_apb_ictl is used as secondary interrupt controller */ + aic: interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 3 4>; + }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; +...