From patchwork Mon Oct 12 06:12:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317622 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4332688ilm; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvxemET5VYiTMkHtxsxCQ3WFfAuiJV6tZefSEHq/xBZ5g4o1SCzRzugMUbpHPY1L/MEW/9 X-Received: by 2002:a17:906:b291:: with SMTP id q17mr26356123ejz.455.1602483204065; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602483204; cv=none; d=google.com; s=arc-20160816; b=T0134BXWO9lUzpCrq+BIdWjUECZSaIjuBKCpSAipj7Z0ftqNpc8Gphsqh8MmiWKEjC CLiIzdy6Op63/DAzcrx0SDaDuWai12+pM3R4v8sA0Y8WOUUFe5Cc4xdxC5owDTNU+Lez rnvJMIAGD7Tdt2IBR7ZfJsz2WdNo/G769hqjjjH/2FWiSuneBbjuxmuZvLFU38mJAOEQ 95OTS/LWJZTzslbHF6+87aeD6RSKH8SMLICyLt4FeCBRpZzz8sMHfw8NiM5O8uoEk5vF FLQfD9MtO2UdgXHjZVpVqdbiaGt27XlxXBn52GbVEei1BIHp2P7qVCF5drYQSJZhv87/ y6Eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ptC1ntDbpeQBl4a1u0ddxBl/cS1YUfD8vz4A+pP8kOY=; b=G0XLMt/T/1qXPkHDSvwwvomwz6qykqvY3FG9diX2339ilcQ7iimMEJ1AjWop368+9A gSegBA4PUAnRYoZEq1W5iiZsZ7Rc79XS1JaBMG9uExaAV9JOehqxEx6f2UKPyRKdtMxj wLlWAenAtHkB2vniui8TPSvxfqFCexNqGPKW/HLxsfvDCcTRTuE1cV9lADjlY6mApXLX zywWs6nrhFA2NrvMD6YHjyb2803Dxs+bAKqSyZzeJenO5QEZqB3M8jy8YsNK22JUNFA3 k4r2OIggjGSr0vjSKKuMmTpTF8a1jiOqA43NmNo8pIIM+/iLvregA596KuYSdUkynCL/ L0cw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id pg3si13843761ejb.685.2020.10.11.23.13.23; Sun, 11 Oct 2020 23:13:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727418AbgJLGNG (ORCPT + 6 others); Mon, 12 Oct 2020 02:13:06 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:33580 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727241AbgJLGMt (ORCPT ); Mon, 12 Oct 2020 02:12:49 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id D1793321CB20E1F84D70; Mon, 12 Oct 2020 14:12:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 14:12:39 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v2 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml Date: Mon, 12 Oct 2020 14:12:22 +0800 Message-ID: <20201012061225.1597-8-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012061225.1597-1-thunder.leizhen@huawei.com> References: <20201012061225.1597-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same clock. Signed-off-by: Zhen Lei --- arch/arm/boot/dts/hi3519.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 1.8.3 diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi index 630753c0d704427..c524c854d319243 100644 --- a/arch/arm/boot/dts/hi3519.dtsi +++ b/arch/arm/boot/dts/hi3519.dtsi @@ -127,8 +127,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12120000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -139,8 +139,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12121000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI1_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>; @@ -151,8 +151,8 @@ compatible = "arm,pl022", "arm,primecell"; reg = <0x12122000 0x1000>; interrupts = ; - clocks = <&crg HI3519_SPI2_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>; + clock-names = "sspclk", "apb_pclk"; num-cs = <1>; #address-cells = <1>; #size-cells = <0>;