From patchwork Mon Oct 12 13:17:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 317632 Delivered-To: patch@linaro.org Received: by 2002:a92:d603:0:0:0:0:0 with SMTP id w3csp4616714ilm; Mon, 12 Oct 2020 06:19:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCxzZklZ2g6y+AExSdC5DuF6TO0hD8bxoQDBw+XEsnfdaj3vDMs9PRyVyEkGACkv0SVccM X-Received: by 2002:a17:906:a207:: with SMTP id r7mr28928533ejy.32.1602508796154; Mon, 12 Oct 2020 06:19:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1602508796; cv=none; d=google.com; s=arc-20160816; b=OFgFtekWBjM+3vtPjvWQsjy9gHH2woBOZNrfK7C5aSXqniOC/G6/ukEm2F0S42GeFU r+pv9sZL/NWx83pth8afNICcpGH/l70suczLBGOsISLaDCA+/r7XgM7UtOn2A3qtaBMJ VcRdc5KjQOwQndK4BWS4rGkUpz5r77uuePExuDf3hKpAZI60I/Q2mOTjzJxPbsGzCUT4 X0KIIP5xBnr/Jrl2s455OREEnOYF/hvkeHIgIvF90a9yWxb2oAJk8LiYSVDzNVTlmriM +3np7xylVRPIo7kavwZQNSwxXmrECt8jXhds6ypEdhrjvBzuxQ7AfVYwBa27gxokjm7s bTJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Om3rrhjQM1xhOuv+1COS+kXeffn6dSOACZYs1Bz/xuY=; b=VNDQMGqQjf1D4/SPzgr53QuTCzwzHTUhRm5HPam/B1eePhSRKIu0fAU6bsGzPfMPL4 6w3yIklG3EFiuD1xro/Da092mT6TwKCQm/JRSwLxrEd6OUNjRTx99JevEhHh1hMaxB6T UXD8+m6lJPGxDrGGKiKieKCmJNlsvGernauynZ2ocMLytVGe7YHXnR+lTDbWDbqL76fu Ek15vrd1fiRdDDDOQ/8K2ftBiFWA7SiooiQ7VoEQsKFOSw/HS3A2DAemTF49QeyuBcOC rs3qWpSWp/Wv463zRqTODGplh4WsDtVa6vpLRYvJzCwi+G27ivvpAFcJSb7xWPJri4yC 7Suw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dp1si12424524ejc.606.2020.10.12.06.19.55; Mon, 12 Oct 2020 06:19:56 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388959AbgJLNTz (ORCPT + 6 others); Mon, 12 Oct 2020 09:19:55 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:56900 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2388956AbgJLNTy (ORCPT ); Mon, 12 Oct 2020 09:19:54 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id A06F4E63F6AAF79F48A2; Mon, 12 Oct 2020 21:19:35 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.134) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Mon, 12 Oct 2020 21:19:28 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH 09/11] arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml Date: Mon, 12 Oct 2020 21:17:37 +0800 Message-ID: <20201012131739.1655-10-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20201012131739.1655-1-thunder.leizhen@huawei.com> References: <20201012131739.1655-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.134] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The arm,pl022 binding need to specify two clocks: "sspclk", "apb_pclk". But only "apb_pclk" is specified now. Because the driver preferentially matches the first clock. Otherwise, it matches the second clock instead of both clocks. So both of them use the same clock don't change the function. Signed-off-by: Zhen Lei --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++---- arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 4 ++-- 3 files changed, 8 insertions(+), 8 deletions(-) -- 1.8.3 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 3f6b1715835af06..edb80abf45b327b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -971,8 +971,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>, <&crg_ctrl HI3660_CLK_GATE_SPI2>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi2_pmx_func &spi2_cfg_func>; num-cs = <1>; @@ -986,8 +986,8 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>; - clock-names = "apb_pclk"; + clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>, <&crg_ctrl HI3660_CLK_GATE_SPI3>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi3_pmx_func &spi3_cfg_func>; num-cs = <1>; diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi index 11a72891e2a3a65..1c7dda972c92856 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi @@ -291,8 +291,8 @@ interrupts = ; num-cs = <1>; cs-gpios = <&gpio7 1 0>; - clocks = <&crg HISTB_SPI0_CLK>; - clock-names = "apb_pclk"; + clocks = <&crg HISTB_SPI0_CLK>, <&crg HISTB_SPI0_CLK>; + clock-names = "sspclk", "apb_pclk"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 014735a9bc7312d..c6580c9f068ebf7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -725,8 +725,8 @@ interrupts = <0 50 4>; bus-id = <0>; enable-dma = <0>; - clocks = <&sys_ctrl HI6220_SPI_CLK>; - clock-names = "apb_pclk"; + clocks = <&sys_ctrl HI6220_SPI_CLK>, <&sys_ctrl HI6220_SPI_CLK>; + clock-names = "sspclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>; num-cs = <1>;