From patchwork Mon Jan 18 03:16:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 365446 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp1886569jap; Sun, 17 Jan 2021 19:21:33 -0800 (PST) X-Google-Smtp-Source: ABdhPJwhwNKZToPAJsq54nXo4jRlmWZrjKm41my3gJPqbM5Xj6F5+DzSIdibYBmLacZyatyLk1TA X-Received: by 2002:a05:6402:1b11:: with SMTP id by17mr5047158edb.373.1610940093447; Sun, 17 Jan 2021 19:21:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610940093; cv=none; d=google.com; s=arc-20160816; b=aUrfhYAzz7vRnDFNsyh/XKmWTx+JPgCuiCj2h/4YMAiQ4E26L93BXpYrU7mfIYpm0C xyRKIxIIK1vNiGvgNZAQW6SwbM4g/aA7rA2mlGI7xxWG45OB9LfmdItSWTDkZ81yYcZ6 S3fKnSaJa/uH99oehjCrKgV2xbldOpENXtWzyP2UEaAvVOhnXvarUIQijeWK0go3JSTO AzrJJI/botgroN9XI8IenUb14nG5+pUV/Sn/wZYtLdNx1Z2uFKnO6mNTqtYl8Zlvd4eK bqblur4plCSKdMMzutTT1r3WvaNds7fkbLeauq1dAlHKunTyybZM/KSRqvY3q8K/7fQC nwIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lGGdPYT/psHJgO3yD6M9GTSuZpB0UaNLLkKMoGyVkLE=; b=nyERm+1Rd3uHyPwTK4GgMgUYDFJkxSPT9GbnWttNZIeGnUNGwsyAVHDqaB9ihu0yIS 6xwwTYWbVvIFf8m+IxMnZ26kt+g4W6yXAbuqUlLnFgUv3kocajPxi/qh2ra7McDQcPDt u8cX+16lxe9MQ7+Yt3wpk5bG8/iruC5I5ar2wLVnkX/Z3XZvxnaJAboM1Vofi/GAjZYt QE4+gx5CRyBy8yOXD81oP2mmP/lHLjQP2U54NkMx4BlqQppMTlj92lKGKK0yWsWWxKCS Z1DW+lUAnn5xJT3qNgIJRvX2ooD8aNxUdX15HevNxN+Vh1kqUeTSd1XJYwUkcVlf79PN LsRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s16si6736441ejf.641.2021.01.17.19.21.33; Sun, 17 Jan 2021 19:21:33 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730600AbhARDVb (ORCPT + 6 others); Sun, 17 Jan 2021 22:21:31 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:11105 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731525AbhARDVb (ORCPT ); Sun, 17 Jan 2021 22:21:31 -0500 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4DJxq34L02z15v8l; Mon, 18 Jan 2021 11:19:43 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.498.0; Mon, 18 Jan 2021 11:20:41 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel CC: Zhen Lei Subject: [PATCH 2/6] arm64: dts: hisilicon: place clock-names "bus" before "core" Date: Mon, 18 Jan 2021 11:16:30 +0800 Message-ID: <20210118031634.934-3-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20210118031634.934-1-thunder.leizhen@huawei.com> References: <20210118031634.934-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Look at the clock-names schema defined in arm,mali-utgard.yaml: clock-names: items: - const: bus - const: core The "bus" needs to be placed before the "core". Signed-off-by: Zhen Lei --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index c6580c9f068ebf7..f9953303a3f44dc 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -1053,7 +1053,7 @@ "ppmmu3"; clocks = <&media_ctrl HI6220_G3D_CLK>, <&media_ctrl HI6220_G3D_PCLK>; - clock-names = "core", "bus"; + clock-names = "bus", "core"; assigned-clocks = <&media_ctrl HI6220_G3D_CLK>, <&media_ctrl HI6220_G3D_PCLK>; assigned-clock-rates = <500000000>, <144000000>;