@@ -45,7 +45,8 @@ RAMC SDRAM/DDR Controller required properties:
"atmel,at91sam9260-sdramc",
"atmel,at91sam9g45-ddramc",
"atmel,sama5d3-ddramc",
- "microchip,sam9x60-ddramc"
+ "microchip,sam9x60-ddramc",
+ "microchip,sama7g5-uddrc"
- reg: Should contain registers location and length
Examples:
@@ -55,6 +56,17 @@ Examples:
reg = <0xffffe800 0x200>;
};
+RAMC PHY Controller required properties:
+- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
+- reg: Should contain registers location and length
+
+Example:
+
+ ddr3phy: ddr3phy@e3804000 {
+ compatible = "microchip,sama7g5-ddr3phy", "syscon";
+ reg = <0xe3804000 0x1000>;
+};
+
SHDWC Shutdown Controller
required properties:
Add RAM controller and RAM PHY controller DT bindings. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- .../devicetree/bindings/arm/atmel-sysregs.txt | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)