| Message ID | 20210722024227.3313096-2-bjorn.andersson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | drm/msm/dp: Allow variation in register regions | expand |
On 2021-07-21 19:42, Bjorn Andersson wrote: > reg was defined as one region covering the entire DP block, but the > memory map is actually split in 4 regions and obviously the size of > these regions differs between platforms. > > Switch the reg to require that all four regions are specified instead. > It is expected that the implementation will handle existing DTBs, even > though the schema defines the new layout. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > .../bindings/display/msm/dp-controller.yaml | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git > a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > index 64d8d9e5e47a..a6e41be038fc 100644 > --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml > @@ -19,7 +19,11 @@ properties: > - qcom,sc7180-dp > > reg: > - maxItems: 1 > + items: > + - description: ahb register block > + - description: aux register block > + - description: link register block > + - description: p0 register block Do you also want to add the p1 register block here? > > interrupts: > maxItems: 1 > @@ -100,7 +104,10 @@ examples: > > displayport-controller@ae90000 { > compatible = "qcom,sc7180-dp"; > - reg = <0xae90000 0x1400>; > + reg = <0xae90000 0x200>, > + <0xae90200 0x200>, > + <0xae90400 0xc00>, > + <0xae91000 0x400>; here too? > interrupt-parent = <&mdss>; > interrupts = <12>; > clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..a6e41be038fc 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -19,7 +19,11 @@ properties: - qcom,sc7180-dp reg: - maxItems: 1 + items: + - description: ahb register block + - description: aux register block + - description: link register block + - description: p0 register block interrupts: maxItems: 1 @@ -100,7 +104,10 @@ examples: displayport-controller@ae90000 { compatible = "qcom,sc7180-dp"; - reg = <0xae90000 0x1400>; + reg = <0xae90000 0x200>, + <0xae90200 0x200>, + <0xae90400 0xc00>, + <0xae91000 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
reg was defined as one region covering the entire DP block, but the memory map is actually split in 4 regions and obviously the size of these regions differs between platforms. Switch the reg to require that all four regions are specified instead. It is expected that the implementation will handle existing DTBs, even though the schema defines the new layout. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- .../bindings/display/msm/dp-controller.yaml | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) -- 2.29.2