From patchwork Thu May 5 19:45:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 570038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9739C4332F for ; Thu, 5 May 2022 19:47:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385363AbiEETu5 (ORCPT ); Thu, 5 May 2022 15:50:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238792AbiEETuk (ORCPT ); Thu, 5 May 2022 15:50:40 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B6D15E75B; Thu, 5 May 2022 12:46:56 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 51B7B1F45CD4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780014; bh=xzUy2wIyZXyHws5Sfef8bUOIhBVmWMeAQk76VcEPaRI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eOVPVi70rUmGojFG3yEu34VRcLCOrYmReCGhcDWvQJ2s4HSOPhs4Gj+1janAdE+w+ UyXPLWUsJhooEqMvJ1dzcg2vuUnJeIvGe5zXkG8yxz3Gi7jS6Waa7FWzlkVZpF3BPd 8SJ12uM12ezZyu7YLHdTKy7QPFNBl/stxL34IXZiJG6CNpcvugBCGEFShYe0iCCK0W AMISaWJ0IBoxLmhmE7mZtHtgVBUlB2aysdQXLpi7sHmiw6oFXet2pJr2SmPML89+8O +6DOPUKVQY/dO2aCqIug8a5AGYxnq44atGQlD8CCO/2voZJXbfUuqXbi/o2Gfoz64C 6xeQciBOFYGFw== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 14/16] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi Date: Thu, 5 May 2022 15:45:48 -0400 Message-Id: <20220505194550.3094656-15-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 4f9a9ec046b0..87a9a6b1eabc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -66,6 +66,19 @@ pp3300_u: pp3300-u { vin-supply = <&pp3300_g>; }; + pp3300_wlan: pp3300-wlan { + compatible = "regulator-fixed"; + regulator-name = "pp3300_wlan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + pinctrl-0 = <&pp3300_wlan_pins>; + enable-active-high; + gpio = <&pio 143 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 5.0V power rail */ pp5000_a: pp5000-a { compatible = "regulator-fixed"; @@ -84,6 +97,17 @@ ppvar_sys: ppvar-sys { regulator-always-on; regulator-boot-on; }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + wifi_restricted_dma_region: wifi@c0000000 { + compatible = "restricted-dma-pool"; + reg = <0 0xc0000000 0 0x4000000>; + }; + }; }; &i2c0 { @@ -144,6 +168,28 @@ &i2c7 { pinctrl-0 = <&i2c7_pins>; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + + pcie0: pcie@0,0 { + device_type = "pci"; + reg = <0x0000 0 0 0 0>; + num-lanes = <1>; + bus-range = <0x1 0x1>; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi: wifi@0,0 { + reg = <0x10000 0 0 0 0x100000>, + <0x10000 0 0x100000 0 0x100000>; + memory-region = <&wifi_restricted_dma_region>; + }; + }; +}; + &pio { /* 220 lines */ gpio-line-names = "I2S_DP_LRCK", @@ -434,6 +480,34 @@ pins-bus { }; }; + pcie_pins: pcie-default-pins { + pins-pcie-wake { + pinmux = ; + bias-pull-up; + }; + + pins-pcie-pereset { + pinmux = ; + }; + + pins-pcie-clkreq { + pinmux = ; + bias-pull-up; + }; + + pins-wifi-kill { + pinmux = ; /* WIFI_KILL_L */ + output-high; + }; + }; + + pp3300_wlan_pins: pp3300-wlan-pins { + pins-pcie-en-pp3300-wlan { + pinmux = ; + output-high; + }; + }; + spi1_pins: spi1-default-pins { pins-cs-mosi-clk { pinmux = ,