From patchwork Sat May 21 15:20:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 575332 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01F7CC433F5 for ; Sat, 21 May 2022 15:21:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349843AbiEUPVJ (ORCPT ); Sat, 21 May 2022 11:21:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350776AbiEUPU6 (ORCPT ); Sat, 21 May 2022 11:20:58 -0400 Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AEA86B49B for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) Received: by mail-lj1-x233.google.com with SMTP id e4so11960884ljb.13 for ; Sat, 21 May 2022 08:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ypxafSXytWa1pPBeHJ41K2y3Cfr7QvnghKr6SvtMtAA=; b=sVsrPGNl4w2uM81jjBcYdQWuayrXckKNcmFuPozmWDjyR1Fr/gclJnqTXGjwv4X+V8 RIO5brmBADLHDtD2Sv42lztYE6yDr3XIuXEERzf79palc/9uCf9xyKQAE8oLlI7GjebC B8ZNG9MRjNPwEMY57cuhbYmgzRYeSLP4/2t3H0Fi4WSyfItMM8Et4NrxH8/MF3g4HzQO u7/Efrqfn0bteeC0GeX/urzw2m+g9Be+eFyguzvjQQeJUtRNcTk5m233e4QgXt+X619v fCe12CBt588MrgYSDFgDUpWZP4LrlBcCyPGz1rpZaO4ppugEMvEeqse/LV6+6VoJPeKA Cm8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ypxafSXytWa1pPBeHJ41K2y3Cfr7QvnghKr6SvtMtAA=; b=E23Nn8wMAvjN3EIIZbjCou6Y6z4ea2YJXFs8taH1c40YDy40FxvKYpDBzqR3ySBlp7 mGm6+8NfKVvjrJQM8luHeHndiupkfOvP0PLfY/Yt4uCt7Ki+wExfXMcYLMtZ5hCmYrGl iHwAA+eU8MCNSOZ9otVpB1tW1CbNuf170/3Rp7QuyoU/l7dXaym08tLU1+CI+AmfnSFF ygYCePUscHkG2oEyizf3CUeyf+zUMZqb/gdkfEC30SZ6O59GRa5L6d6ZDGRAdDX5DnG5 /IF5dDRA5fyqlJ5ABezni8HLscM1pCJ2HquuZWjsl37DWLDGN7uIahBwRDTYkn1kwWj0 FyBw== X-Gm-Message-State: AOAM530nzehEavBXBjK5BqBcuYRSwuA3z5QKio11rfX+L5P8ZSiFJ7a6 QazUYHodxOzn+7ZObcRGHeSVcQ== X-Google-Smtp-Source: ABdhPJzPKkNLgObUuVY2ib/KxfYASVtn+LlCqft0cS9/wYeLPNO8+2KpiQEhJi0Xu54U92os4NOANA== X-Received: by 2002:a2e:bf27:0:b0:246:7ed6:33b0 with SMTP id c39-20020a2ebf27000000b002467ed633b0mr8271812ljr.167.1653146454828; Sat, 21 May 2022 08:20:54 -0700 (PDT) Received: from eriador.lumag.spb.ru ([94.25.229.156]) by smtp.gmail.com with ESMTPSA id k8-20020a2e92c8000000b0024f3d1daeccsm739933ljh.84.2022.05.21.08.20.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 May 2022 08:20:54 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Marijn Suijten , Konrad Dybcio Subject: [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default Date: Sat, 21 May 2022 18:20:40 +0300 Message-Id: <20220521152049.1490220-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> References: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Follow the typical practice and keep DSI1/DSI1 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Reviewed-by: Marijn Suijten Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi index eccf6fde16b4..023b0ac4118c 100644 --- a/arch/arm64/boot/dts/qcom/sdm660.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi @@ -192,6 +192,8 @@ dsi1: dsi@c996000 { phys = <&dsi1_phy>; phy-names = "dsi"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; @@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 { clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "ref"; + status = "disabled"; }; };