From patchwork Wed Jun 1 23:36:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 577900 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52211C43334 for ; Wed, 1 Jun 2022 23:36:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232526AbiFAXgV (ORCPT ); Wed, 1 Jun 2022 19:36:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232504AbiFAXgV (ORCPT ); Wed, 1 Jun 2022 19:36:21 -0400 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62C092342AB for ; Wed, 1 Jun 2022 16:36:19 -0700 (PDT) Received: by mail-pj1-x1031.google.com with SMTP id j7so3391202pjn.4 for ; Wed, 01 Jun 2022 16:36:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:mime-version; bh=VaSBGOUNy0mlPi1K4uby5PsDtNwS/FYp6UY7j8NfV0Q=; b=Kebx8GQpq0Tl2T6VrxR18i0hfwOulxHldWMX/2Zl4dmZ1lzLim6YKFuGwTgABO1t1M hBbAK4nUcUH2p4B9qcNtFmdY5YzkW/Zzo1nZHkJc55QvVjj3vyk+8TE7AoEFklxFPOUt OiSaTMZHZszVBJd2A16CrVyn1xY/k3UDeGXts= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version; bh=VaSBGOUNy0mlPi1K4uby5PsDtNwS/FYp6UY7j8NfV0Q=; b=D8ZviNZEZNHsLrd9arHkY3endtnBsY9JNJauJWAOwOepOfg1Rt7L81Tnj23cy3hatw ZVmj6IJb/yZKJP+iCWOVzzrBceEvM1i4GbYNa4cRmh0tPm7PK4b1AKemA25jT2RFUOwk 7Qbj8neJliqgwLyJKyja38cp64DhTGdYwDZykrafEIGebNCzdNLuiHaCXp3SXgzNRnzK FKiAhD6vDnlQP4aYkUyu0R7vE8Z14TbOM5eoyewBuDNB9IoMKIAR70hLirFq7XQnyp/H M6jmurg2mQvQfqvnHq24HXakmm+onOwiqX+Y/pOa8MZtrLIBiqPcO3YlQ59ADuEaDq7f NTAg== X-Gm-Message-State: AOAM531wSQJ/NS1E14WlPAslJ93SsqCINr8XjMBMFyO0IR6+7CjOX5um yOL4rrEvyoCM3HqLg1f7nbPO7w== X-Google-Smtp-Source: ABdhPJzvzqKb9GVJg82kSPxSACcMOX65lh2MUVyPpyI+Vw6JvppE4xARYoF0NaNp+PtE1NJiwbTwbg== X-Received: by 2002:a17:90b:1bd1:b0:1df:b6eb:2b20 with SMTP id oa17-20020a17090b1bd100b001dfb6eb2b20mr1920319pjb.221.1654126578797; Wed, 01 Jun 2022 16:36:18 -0700 (PDT) Received: from T3500-3.dhcp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id bx10-20020a056a00428a00b005182e39038csm1978639pfb.38.2022.06.01.16.36.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 16:36:18 -0700 (PDT) From: William Zhang To: Linux ARM List Cc: joel.peshkin@broadcom.com, anand.gore@broadcom.com, Broadcom Kernel List , kursad.oney@broadcom.com, florian.fainelli@broadcom.com, William Zhang , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] ARM: dts: update bcm47622 dts file Date: Wed, 1 Jun 2022 16:36:06 -0700 Message-Id: <20220601233606.23281-1-william.zhang@broadcom.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix a few issue in bcm47622.dtsi file: - Remove unnecessary cpu_on and cpu_off properties from psci node - Add the missing gic registers and interrupts property to gic node - Cosmetic changes Signed-off-by: William Zhang --- arch/arm/boot/dts/bcm47622.dtsi | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi index c016e12b7372..2df04528af82 100644 --- a/arch/arm/boot/dts/bcm47622.dtsi +++ b/arch/arm/boot/dts/bcm47622.dtsi @@ -32,6 +32,7 @@ CA7_1: cpu@1 { next-level-cache = <&L2_0>; enable-method = "psci"; }; + CA7_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; @@ -39,6 +40,7 @@ CA7_2: cpu@2 { next-level-cache = <&L2_0>; enable-method = "psci"; }; + CA7_3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; @@ -46,6 +48,7 @@ CA7_3: cpu@3 { next-level-cache = <&L2_0>; enable-method = "psci"; }; + L2_0: l2-cache0 { compatible = "cache"; }; @@ -76,6 +79,7 @@ periph_clk: periph-clk { #clock-cells = <0>; clock-frequency = <200000000>; }; + uart_clk: uart-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; @@ -88,23 +92,23 @@ uart_clk: uart-clk { psci { compatible = "arm,psci-0.2"; method = "smc"; - cpu_off = <1>; - cpu_on = <2>; }; axi@81000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x81000000 0x818000>; + ranges = <0 0x81000000 0x8000>; gic: interrupt-controller@1000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; - #address-cells = <0>; interrupt-controller; + interrupts = ; reg = <0x1000 0x1000>, - <0x2000 0x2000>; + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; }; };