From patchwork Tue Jun 7 19:00:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 579520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2133C43334 for ; Tue, 7 Jun 2022 21:57:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354683AbiFGV5u (ORCPT ); Tue, 7 Jun 2022 17:57:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383446AbiFGVxM (ORCPT ); Tue, 7 Jun 2022 17:53:12 -0400 Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9F1B24446F for ; Tue, 7 Jun 2022 12:11:44 -0700 (PDT) Received: by mail-pg1-x52f.google.com with SMTP id d129so16743312pgc.9 for ; Tue, 07 Jun 2022 12:11:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y9v+zfN+LDZJBzv64yfNd1oezlZ5d8K5Q7FPfZj4YOs=; b=MqSRLcI9BH2Og5WEHOEXrEXxc6/IJDbQEKpVB/xaJSTHPdJt6e6mTgYsBo2p5JHUm3 4qza7GyCwvpG8ZDUtQWYZxg8BOfd5cdXnHg10Bdc4zD98BIgxoSEzeYnnIBiXglepADs iVqV5Epkav9UXLpkGqTq9CUPDvw+gGhPbyFoc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y9v+zfN+LDZJBzv64yfNd1oezlZ5d8K5Q7FPfZj4YOs=; b=XjASedAWh7OOYcTIuH66gHh/RIvnvMDmI0gYV9fsIIx8K76qDoKn4DfAKBXxCJuQwB kRW9iG6P3o4rKQX2O+Da/5eSeS645QwRWzj0zkfNP1e2OLJ7aPjyrR734395RjiziBLa JUaOPnrnTOoyHRX6DBBIxrFcPvvSF/sDuylHfW9cdjnPfgVfc1A7MaGlAf2LQZGC72SC k4N4qRuoilsHCmJMmo7vzB0SEL/P/YlqoKx7TkrKL0a6YR8CPIknR7QpnMAXRW2P0yhZ LVOXxp7lyIOpXNRKtyRF5OlK8UdyexwlYC8RxcFyLGbjOVp9QEXd/UApX8ibUnqO1G19 SanQ== X-Gm-Message-State: AOAM530hVjJhFO1LneVGbAYIxW9iWoJrgUU3jVj1Jb/du7iqqZ1gDmmf UON5rW8rheIWOBsNP/Y1rEVSXw== X-Google-Smtp-Source: ABdhPJy42YNTwejMbajhVemlLo4iEhdSYP1Ea5z93nYnnsV1N64UMZ1hkHmT1boNizeLbkEDtlqzDg== X-Received: by 2002:a63:fa56:0:b0:3fc:d3d2:ceac with SMTP id g22-20020a63fa56000000b003fcd3d2ceacmr26639313pgk.99.1654629103599; Tue, 07 Jun 2022 12:11:43 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id g29-20020aa79ddd000000b0050dc762819esm13236084pfq.120.2022.06.07.12.11.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jun 2022 12:11:43 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: bleung@chromium.org, swboyd@chromium.org, heikki.krogerus@linux.intel.com, Pin-Yen Lin , Prashant Malani , Andrzej Hajda , AngeloGioacchino Del Regno , Daniel Vetter , David Airlie , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS), Greg Kroah-Hartman , Hsin-Yi Wang , Jernej Skrabec , Jonas Karlman , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Krzysztof Kozlowski , Laurent Pinchart , Maxime Ripard , Neil Armstrong , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Robert Foss , Rob Herring , Sam Ravnborg , Thomas Zimmermann , Xin Ji Subject: [PATCH 7/7] drm/bridge: anx7625: Add typec_mux_set callback function Date: Tue, 7 Jun 2022 19:00:25 +0000 Message-Id: <20220607190131.1647511-8-pmalani@chromium.org> X-Mailer: git-send-email 2.36.1.255.ge46751e96f-goog In-Reply-To: <20220607190131.1647511-1-pmalani@chromium.org> References: <20220607190131.1647511-1-pmalani@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Pin-Yen Lin Add the callback function when the driver receives state changes of the Type-C port. The callback function configures the crosspoint switch of the anx7625 bridge chip, which can change the output pins of the signals according to the port state. Signed-off-by: Pin-Yen Lin Signed-off-by: Prashant Malani Reported-by: kernel test robot --- drivers/gpu/drm/bridge/analogix/anx7625.c | 58 +++++++++++++++++++++++ drivers/gpu/drm/bridge/analogix/anx7625.h | 13 +++++ 2 files changed, 71 insertions(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c index d41a21103bd3..2c308d12fab2 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -2582,9 +2583,66 @@ static void anx7625_runtime_disable(void *data) pm_runtime_disable(data); } +static void anx7625_set_crosspoint_switch(struct anx7625_data *ctx, + enum typec_orientation orientation) +{ + if (orientation == TYPEC_ORIENTATION_NORMAL) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX1 | SW_SEL1_DPTX0_RX2); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX1 | SW_SEL2_DPTX1_TX2); + } else if (orientation == TYPEC_ORIENTATION_REVERSE) { + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_0, + SW_SEL1_SSRX_RX2 | SW_SEL1_DPTX0_RX1); + anx7625_reg_write(ctx, ctx->i2c.tcpc_client, TCPC_SWITCH_1, + SW_SEL2_SSTX_TX2 | SW_SEL2_DPTX1_TX1); + } +} + +static void anx7625_typec_two_ports_update(struct anx7625_data *ctx) +{ + if (ctx->typec_ports[0].dp_connected && ctx->typec_ports[1].dp_connected) + /* Both ports available, do nothing to retain the current one. */ + return; + else if (ctx->typec_ports[0].dp_connected) + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_NORMAL); + else if (ctx->typec_ports[1].dp_connected) + anx7625_set_crosspoint_switch(ctx, TYPEC_ORIENTATION_REVERSE); +} + static int anx7625_typec_mux_set(struct typec_mux_dev *mux, struct typec_mux_state *state) { + struct anx7625_port_data *data = typec_mux_get_drvdata(mux); + struct anx7625_data *ctx = data->ctx; + struct device *dev = &ctx->client->dev; + + bool old_dp_connected = (ctx->typec_ports[0].dp_connected || + ctx->typec_ports[1].dp_connected); + bool new_dp_connected; + + if (ctx->num_typec_switches == 1) + return 0; + + dev_dbg(dev, "mux_set dp_connected: c0=%d, c1=%d\n", + ctx->typec_ports[0].dp_connected, ctx->typec_ports[1].dp_connected); + + data->dp_connected = (state->alt && state->alt->svid == USB_TYPEC_DP_SID && + state->alt->mode == USB_TYPEC_DP_MODE); + + new_dp_connected = (ctx->typec_ports[0].dp_connected || + ctx->typec_ports[1].dp_connected); + + /* dp on, power on first */ + if (!old_dp_connected && new_dp_connected) + pm_runtime_get_sync(dev); + + anx7625_typec_two_ports_update(ctx); + + /* dp off, power off last */ + if (old_dp_connected && !new_dp_connected) + pm_runtime_put_sync(dev); + return 0; } diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index 76cfc64f7574..7d6c6fdf9a3a 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -55,6 +55,18 @@ #define HPD_STATUS_CHANGE 0x80 #define HPD_STATUS 0x80 +#define TCPC_SWITCH_0 0xB4 +#define SW_SEL1_DPTX0_RX2 BIT(0) +#define SW_SEL1_DPTX0_RX1 BIT(1) +#define SW_SEL1_SSRX_RX2 BIT(4) +#define SW_SEL1_SSRX_RX1 BIT(5) + +#define TCPC_SWITCH_1 0xB5 +#define SW_SEL2_DPTX1_TX2 BIT(0) +#define SW_SEL2_DPTX1_TX1 BIT(1) +#define SW_SEL2_SSTX_TX2 BIT(4) +#define SW_SEL2_SSTX_TX1 BIT(5) + /******** END of I2C Address 0x58 ********/ /***************************************************************/ @@ -444,6 +456,7 @@ struct anx7625_i2c_client { }; struct anx7625_port_data { + bool dp_connected; struct typec_mux_dev *typec_mux; struct anx7625_data *ctx; };