| Message ID | 20220703091451.1416264-8-peng.fan@oss.nxp.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V3,1/7] dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl | expand |
Hi Marco, On 29/3/23 01:11, Marco Felsch wrote: > Hi Greg, > > On 23-03-29, Greg Ungerer wrote: >> Hi Marco, > > ... > >>> I forgot to ask: Does your i.MX8MP have a VPU? There are i.MX8MP devices >>> (don't know the name) which don't have support for certain IPs. If this >> >> The hardware platform I have is using the MIMX8ML4CVNKZAB "i.MX 8M Plus QuadLite" >> (https://www.nxp.com/part/MIMX8ML4CVNKZAB#/) which does not have the hardware >> video encode/decoder module (like the "i.MX 8M Plus Quad" parts). > > and that's the problem :) You need to update your bootloader to a > version which support disabling the VPU nodes else you will always see > the errors. I agree this is the problem, I don't agree that the boot loader is the only place to fix this :-) I should be able to generate a working devicetree blob from the kernel that is good, and ready to use no runtime changes required I figure. It is not overly difficult to break out the vpu nodes and have them only included when you have a board that has the iMX8MP-quad with the VPU hardware blocks. Example patch attached. Regards Greg
On 31/3/23 18:11, Ahmad Fatoum wrote: > On 31.03.23 09:45, Markus Niebel wrote: >> Am Freitag, dem 31.03.2023 um 15:55 +1000 schrieb Greg Ungerer: >>> On 29/3/23 01:11, Marco Felsch wrote: >>>> On 23-03-29, Greg Ungerer wrote: >>> I agree this is the problem, I don't agree that the boot loader is >>> the >>> only place to fix this :-) I should be able to generate a working >>> devicetree >>> blob from the kernel that is good, and ready to use no runtime >>> changes >>> required I figure. >>> >> >> Just to point out: the approach of run time fixing in boot loader is >> used for the other i.MX8M SOC, too. If you know exactly what SOC type >> is assembled, you could disable non available IP in the board part of >> your tree. >> >>> It is not overly difficult to break out the vpu nodes and have them >>> only included when you have a board that has the iMX8MP-quad with the >>> VPU hardware blocks. > > This breaks out-of-tree DTs that include imx8mp.dtsi. Logic should be the > other way round: imx8mp.dtsi is full-featured SoC and any new includes > strip away, not add nodes. > >> Depending on the SOC type there is more to look for than the VPU: core >> count, ISP, NPU - just to mention a few. Current approach allows to >> keep a single tree for all types. > > +1. > > @Greg, does your board always ship with an i.MX8MPLite? If so, just > disable VPUs in your board DT. Yes, it will only ever have the Lite. That is why I only want to generate a devicetree blob without the VPU nodes. Regards Greg > If it ships with either VPUs available or not and you don't want to do > bootloader fixups, you may want to check out Kbuild's ability to apply > DT overlays at build time. This would give you separate DTs for each > variant while not having an extra file for every combination. > > Cheers, > Ahmad > > >> >> Regards, Markus >> >
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 08bd57742294..9cceeeeb26be 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1109,6 +1109,11 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { <&pgc_hsiomix>, <&pgc_pcie_phy>; power-domain-names = "bus", "usb", "usb-phy1", "usb-phy2", "pcie", "pcie-phy"; + interconnects = <&noc IMX8MP_ICM_NOC_PCIE &noc IMX8MP_ICN_HSIO>, + <&noc IMX8MP_ICM_USB1 &noc IMX8MP_ICN_HSIO>, + <&noc IMX8MP_ICM_USB2 &noc IMX8MP_ICN_HSIO>, + <&noc IMX8MP_ICM_PCIE &noc IMX8MP_ICN_HSIO>; + interconnect-names = "noc-pcie", "usb1", "usb2", "pcie"; #power-domain-cells = <1>; }; };