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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/marvell,orion-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell Orion NAND Controller Device Tree Bindings
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - Andrew Lunn <andrew@lunn.ch>
+
+properties:
+ "#address-cells": true
+ "#size-cells": true
+
+ compatible:
+ enum:
+ - marvell,orion-nand
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ cle:
+ description:
+ Address line number connected to CLE. Default is 0
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 255
+
+ ale:
+ description:
+ Address line number connected to ALE. Default is 1
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 255
+
+ bank-width:
+ description: Width (in bytes) of the bank. Equal to the device width times
+ the number of interleaved chips.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 1, 2, 4 ]
+
+ chip-delay:
+ description:
+ Chip dependent delay for transferring data from array to read
+ registers in usecs
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 255
+
+ partitions:
+ type: object
+
+patternProperties:
+ "@[0-9a-f]+$":
+ $ref: "/schemas/mtd/partitions/partition.yaml"
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ nand-controller@f4000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cle = <0>;
+ ale = <1>;
+ bank-width = <1>;
+ chip-delay = <25>;
+ compatible = "marvell,orion-nand";
+ reg = <0xf4000000 0x400>;
+ };
+...
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-NAND support for Marvell Orion SoC platforms
-
-Required properties:
-- compatible : "marvell,orion-nand".
-- reg : Base physical address of the NAND and length of memory mapped
- region
-
-Optional properties:
-- cle : Address line number connected to CLE. Default is 0
-- ale : Address line number connected to ALE. Default is 1
-- bank-width : Width in bytes of the device. Default is 1
-- chip-delay : Chip dependent delay for transferring data from array to read
- registers in usecs
-
-The device tree may optionally contain sub-nodes describing partitions of the
-address space. See partition.txt for more detail.
-
-Example:
-
-nand@f4000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- cle = <0>;
- ale = <1>;
- bank-width = <1>;
- chip-delay = <25>;
- compatible = "marvell,orion-nand";
- reg = <0xf4000000 0x400>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x200000>;
- };
-
- partition@300000 {
- label = "dtb";
- reg = <0x0300000 0x100000>;
- };
-
- partition@400000 {
- label = "root";
- reg = <0x0400000 0x7d00000>;
- };
-};
This works for Kirkwood, but orion5x has an odd bus structure which results in some warnings. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/mtd/marvell,orion-nand.yaml | 85 +++++++++++++++++++ .../devicetree/bindings/mtd/orion-nand.txt | 50 ----------- 2 files changed, 85 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt