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[76.244.6.13]) by smtp.gmail.com with ESMTPSA id l26-20020a9d709a000000b00661b46cc26bsm6224546otj.9.2022.11.29.09.29.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Nov 2022 09:29:21 -0800 (PST) From: Chris Morgan To: linux-rockchip@lists.infradead.org Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, maccraft123mc@gmail.com, heiko@sntech.de, krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, daniel@ffwll.ch, airlied@gmail.com, sam@ravnborg.org, thierry.reding@gmail.com, linus.walleij@linaro.org, Chris Morgan Subject: [PATCH V4 3/3] arm64: dts: rockchip: add display to RG503 Date: Tue, 29 Nov 2022 11:29:12 -0600 Message-Id: <20221129172912.9576-4-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221129172912.9576-1-macroalpha82@gmail.com> References: <20221129172912.9576-1-macroalpha82@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chris Morgan Add Samsung AMS495QA01 panel to RG503. Signed-off-by: Chris Morgan Signed-off-by: Maya Matuszczyk --- .../dts/rockchip/rk3566-anbernic-rg503.dts | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts index 5dafcc86296b..23442e38a751 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts @@ -47,6 +47,22 @@ gpio_spi: spi { mosi-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; num-chipselects = <0>; + + panel@0 { + compatible = "samsung,ams495qa01"; + reg = <0>; + enable-gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd_enable>, <&lcd_reset>; + reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + vdd-supply = <&vcc3v3_lcd0_n>; + + port { + mipi_in_panel: endpoint { + remote-endpoint = <&mipi_out_panel>; + }; + }; + }; }; /* Channels reversed for both headphones and speakers. */ @@ -94,6 +110,32 @@ &cru { assigned-clock-rates = <1200000000>, <200000000>, <500000000>; }; +&dsi_dphy0 { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + + ports { + dsi0_in: port@0 { + reg = <0>; + + dsi0_in_vp1: endpoint { + remote-endpoint = <&vp1_out_dsi0>; + }; + }; + + dsi0_out: port@1 { + reg = <1>; + + mipi_out_panel: endpoint { + remote-endpoint = <&mipi_in_panel>; + }; + }; + }; +}; + &gpio_keys_control { button-a { gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; @@ -146,6 +188,18 @@ spk_amp_enable_h: spk-amp-enable-h { }; }; + gpio-lcd { + lcd_enable: lcd-enable { + rockchip,pins = + <4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lcd_reset: lcd-reset { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + gpio-spi { spi_pins: spi-pins { rockchip,pins = @@ -164,3 +218,10 @@ rk817_charger: charger { rockchip,sleep-filter-current-microamp = <100000>; }; }; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg = ; + remote-endpoint = <&dsi0_in_vp1>; + }; +};