From patchwork Sat Dec 31 23:14:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Samuel Holland X-Patchwork-Id: 638211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 928DFC53210 for ; Sat, 31 Dec 2022 23:14:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235893AbiLaXOk (ORCPT ); Sat, 31 Dec 2022 18:14:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235872AbiLaXOi (ORCPT ); Sat, 31 Dec 2022 18:14:38 -0500 Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 583B4C3E; Sat, 31 Dec 2022 15:14:37 -0800 (PST) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.nyi.internal (Postfix) with ESMTP id C45FE5C00AF; Sat, 31 Dec 2022 18:14:36 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute5.internal (MEProxy); Sat, 31 Dec 2022 18:14:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1672528476; x= 1672614876; bh=gj3YwYb/ee2y+650wDSXXGGyk6dcEiCvb/zuXgo5cOk=; b=u NXjnlg9bd7th2Y70EJg23Yf/PzAnzeehqcU8N8cjWsniKEWF3j0erT7ilFJh2Y3M wVDUO3gJcz8wuicKAkeZK5V1J6cT7uxHsIJxI6RRkXG2nDwdKjSGBzlWB+RJm/zL GmiJSwjKZxjdGX75CwAAMN9MkPlFMsGypSw/vQIqkZ98yg/FwsJgFLdNXGrDdRuD 0apCD2hB4e/qetG3PxjizPjSqtRP7k6pT1vWGtuVFgNZdPwrYUTOP7ohISKhqQPw m9tSXAZrimW36x2Xd99QtOHkpQR02JN6dJc2ADhYc7nnKKmtB1Od1jjfZyfkRoLF XuGaLp10LYGonzytc9GQA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1672528476; x= 1672614876; bh=gj3YwYb/ee2y+650wDSXXGGyk6dcEiCvb/zuXgo5cOk=; b=h /hFhsVAlmBzPmp5Xg1CHBYrTX0IE2xrY0CEWj3t3BnyjbsGhyDJNYDcrob+YSSo3 Z5khLEdvfRkL8Dczy88qvjucrmIS/tXk147RyEfC4aMs9ndQwbRki8hxH07S0A2L itHZOUyy8M9US2beCqelxD59mHfgXDgM6jn8eMGBHBDzuCtX2NGS9Tr9np94Dz3b esjlsfaiY60bvKc+pYexElNwzWbQ7SZgUI/3ywL6lePWLa8+TCCad2AMeh79TSCy 0LYrBVe6s4YhE2aALZ9kfnoSXCIVkL5hCJ/surhDltbMY7eRAYnclTubnIhe0e9b pv7X02SUPV6tR3BiAtOxg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrieelgddtlecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefhvfevufffkffojghfgggtgfesthekredtredtjeenucfhrhhomhepufgrmhhu vghlucfjohhllhgrnhguuceoshgrmhhuvghlsehshhholhhlrghnugdrohhrgheqnecugg ftrfgrthhtvghrnhepfeeuveeufeefleehlefhleeglefggfeikeffveetfeevjeeuieet uefgfeeiheelnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrh homhepshgrmhhuvghlsehshhholhhlrghnugdrohhrgh X-ME-Proxy: Feedback-ID: i0ad843c9:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sat, 31 Dec 2022 18:14:35 -0500 (EST) From: Samuel Holland To: Chen-Yu Tsai , Jernej Skrabec , Michael Turquette , Stephen Boyd Cc: Samuel Holland , Albert Ou , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, =?utf-8?b?QW5kcsOhcyBTemVtesWR?= , Andre Przywara Subject: [PATCH v2 4/6] clk: sunxi-ng: d1: Mark cpux clock as critical Date: Sat, 31 Dec 2022 17:14:27 -0600 Message-Id: <20221231231429.18357-5-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 In-Reply-To: <20221231231429.18357-1-samuel@sholland.org> References: <20221231231429.18357-1-samuel@sholland.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: András Szemző Some SoCs in the D1 family feature ARM CPUs instead of a RISC-V CPU. In that case, the CPUs are driven from the 'cpux' clock, so it needs to be marked as critical, since there is no consumer when DVFS is disabled. This matches the drivers for other SoCs, and the "riscv" clock in this driver. Signed-off-by: András Szemző Acked-by: Jernej Skrabec Reviewed-by: Andre Przywara Signed-off-by: Samuel Holland --- Changes in v2: - Expand commit message drivers/clk/sunxi-ng/ccu-sun20i-d1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c index 8ef3cdeb7962..c5a7df93602c 100644 --- a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c +++ b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c @@ -240,7 +240,7 @@ static const struct clk_parent_data cpux_parents[] = { { .hw = &pll_periph0_800M_clk.common.hw }, }; static SUNXI_CCU_MUX_DATA(cpux_clk, "cpux", cpux_parents, - 0x500, 24, 3, CLK_SET_RATE_PARENT); + 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL); static const struct clk_hw *cpux_hws[] = { &cpux_clk.common.hw }; static SUNXI_CCU_M_HWS(cpux_axi_clk, "cpux-axi",