@@ -43,7 +43,7 @@ cpus {
CPU0: cpu@0 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-a78c";
reg = <0x0 0x0>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
@@ -67,7 +67,7 @@ L3_0: l3-cache {
CPU1: cpu@100 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-a78c";
reg = <0x0 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
@@ -87,7 +87,7 @@ L2_100: l2-cache {
CPU2: cpu@200 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-a78c";
reg = <0x0 0x200>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
@@ -107,7 +107,7 @@ L2_200: l2-cache {
CPU3: cpu@300 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-a78c";
reg = <0x0 0x300>;
enable-method = "psci";
capacity-dmips-mhz = <602>;
@@ -127,7 +127,7 @@ L2_300: l2-cache {
CPU4: cpu@400 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-x1c";
reg = <0x0 0x400>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
@@ -147,7 +147,7 @@ L2_400: l2-cache {
CPU5: cpu@500 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-x1c";
reg = <0x0 0x500>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
@@ -167,7 +167,7 @@ L2_500: l2-cache {
CPU6: cpu@600 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-x1c";
reg = <0x0 0x600>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
@@ -187,7 +187,7 @@ L2_600: l2-cache {
CPU7: cpu@700 {
device_type = "cpu";
- compatible = "qcom,kryo";
+ compatible = "arm,cortex-x1c";
reg = <0x0 0x700>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
Cores 0-3 are CA78C r0p0, cores 4-7 are CX1C r0p0. Use the correct compatibles instead of the placeholder qcom,kryo. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)