From patchwork Fri Nov 17 22:29:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 744728 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="yfzh3dm6" Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11C1E10C6; Fri, 17 Nov 2023 14:29:50 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AHMTcqM022651; Fri, 17 Nov 2023 16:29:38 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1700260178; bh=jp17e71w0JKMHOxseoOgEdIkZz44qhqSq0Nb6emIzA4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yfzh3dm6sCrU53+q+1csFLy7lr+XzGBykkFbO1puKN4b62JhUJQaHvCb067kVSEYL vdA/qKFBWGoqukHxljhZmwj/kAlAOMr4/lUm6CSpCJV6iHtqfYYcKiua9azLl68FRv GpD9MZgHFsdj+t2EvRoci1tCBX0AIk6coW9TuD4E= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AHMTcax059101 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 17 Nov 2023 16:29:38 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 17 Nov 2023 16:29:38 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 17 Nov 2023 16:29:38 -0600 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AHMTWQL067965; Fri, 17 Nov 2023 16:29:37 -0600 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Andrew Davis Subject: [PATCH 8/8] arm64: dts: ti: k3-j721s2: Convert serdes_ln_ctrl node into reg-mux Date: Fri, 17 Nov 2023 16:29:30 -0600 Message-ID: <20231117222930.228688-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231117222930.228688-1-afd@ti.com> References: <20231117222930.228688-1-afd@ti.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 This removes a dependency on the parent node being a syscon node. Convert from mmio-mux to reg-mux adjusting node name and properties as needed. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index e5597724076c4..918c3e96b1e9e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -58,11 +58,11 @@ phy_gmii_sel_cpsw: phy@34 { }; serdes_ln_ctrl: mux-controller@80 { - compatible = "mmio-mux"; + compatible = "reg-mux"; reg = <0x80 0x10>; #mux-control-cells = <1>; - mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */ - <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */ + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ + <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */ }; ehrpwm_tbclk: clock-controller@140 {