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Mon, 11 Dec 2023 05:48:29 +0000 X-MS-Exchange-Authentication-Results: spf=fail (sender IP is 211.20.1.79) smtp.mailfrom=wiwynn.com; dkim=none (message not signed) header.d=none;dmarc=fail action=quarantine header.from=wiwynn.com; Received-SPF: Fail (protection.outlook.com: domain of wiwynn.com does not designate 211.20.1.79 as permitted sender) receiver=protection.outlook.com; client-ip=211.20.1.79; helo=localhost.localdomain; Received: from localhost.localdomain (211.20.1.79) by HK2PEPF00006FAF.mail.protection.outlook.com (10.167.8.5) with Microsoft SMTP Server id 15.20.7091.18 via Frontend Transport; Mon, 11 Dec 2023 05:48:28 +0000 From: Delphine CC Chiu To: patrick@stwcx.xyz, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: Delphine CC Chiu , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 13/14] ARM: dts: aspeed: yosemite4: support mux to cpld Date: Mon, 11 Dec 2023 13:47:28 +0800 Message-Id: <20231211054730.208588-14-Delphine_CC_Chiu@wiwynn.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231211054730.208588-1-Delphine_CC_Chiu@wiwynn.com> References: <20231211054730.208588-1-Delphine_CC_Chiu@wiwynn.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HK2PEPF00006FAF:EE_|SEZPR04MB6622:EE_ X-MS-Office365-Filtering-Correlation-Id: 8618c39a-4622-477d-9be3-08dbfa0ccd2a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: wiwynn.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Dec 2023 05:48:28.9542 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8618c39a-4622-477d-9be3-08dbfa0ccd2a X-MS-Exchange-CrossTenant-Id: da6e0628-fc83-4caf-9dd2-73061cbab167 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=da6e0628-fc83-4caf-9dd2-73061cbab167; Ip=[211.20.1.79]; Helo=[localhost.localdomain] X-MS-Exchange-CrossTenant-AuthSource: HK2PEPF00006FAF.apcprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR04MB6622 Mux pca9544 to cpld was added on EVT HW schematic design, so add dts setting for devices behind mux pca9544 to cpld Signed-off-by: Delphine CC Chiu --- .../aspeed/aspeed-bmc-facebook-yosemite4.dts | 64 ++++++++++++++----- 1 file changed, 49 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts index c8e3a85b7a11..fdc33bffd467 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts @@ -36,6 +36,10 @@ aliases { i2c31 = &imux31; i2c32 = &imux32; i2c33 = &imux33; + i2c34 = &imux34; + i2c35 = &imux35; + i2c36 = &imux36; + i2c37 = &imux37; }; chosen { @@ -951,24 +955,54 @@ &i2c12 { status = "okay"; bus-frequency = <400000>; - temperature-sensor@48 { - compatible = "ti,tmp75"; - reg = <0x48>; - }; + i2c-mux@70 { + compatible = "nxp,pca9544"; + i2c-mux-idle-disconnect; + reg = <0x70>; - eeprom@50 { - compatible = "atmel,24c128"; - reg = <0x50>; - }; + imux34: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; - eeprom@54 { - compatible = "atmel,24c64"; - reg = <0x54>; - }; + temperature-sensor@48 { + compatible = "ti,tmp75"; + reg = <0x48>; + }; + + eeprom@50 { + compatible = "atmel,24c128"; + reg = <0x50>; + }; - rtc@6f { - compatible = "nuvoton,nct3018y"; - reg = <0x6f>; + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + }; + + rtc@6f { + compatible = "nuvoton,nct3018y"; + reg = <0x6f>; + }; + }; + + imux35: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + imux36: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + imux37: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; }; };