From patchwork Fri Jan 26 23:53:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oreoluwa Babatunde X-Patchwork-Id: 766570 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9246C664C9; Fri, 26 Jan 2024 23:56:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706313372; cv=none; b=F8TFEasTFPP5iRrJ10sLeyQBIv1EO4sQWPp3agxfhwiNKt9jHBW+RUuy7eUV7YoGs+bC7fvm2nGE+ZzzA6NcDTC4XUkkiiQMN5Zu34JSBvQO0JSvkq7NMAf+uYc984BK5flyBE9igfUdkb6TnHCAzV+O9w0yW6sfCNkjQxdW4Dk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706313372; c=relaxed/simple; bh=jKWC7B28H1JalI1Fgriwlg4heR38wHwseI3hCbXy8cA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VDEQqRvN1IyiLDfW/4GxrhDgkxpzGD3/KllKOwX7unuUujNr05C1q7dAInkr9xZJZSaYkr8IvUREcfgbkBrGQLIdwXUGVr3EuSbtrMy5mi8T5rR4u36XQhyK0hERwHVE6d3bKt13TQEwZZUQ1D2gvpssY9X9C+VE/m1jeh/QPfw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=anw6k/Jk; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="anw6k/Jk" Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40QNqddO019345; Fri, 26 Jan 2024 23:55:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=zeUxzUumBvjgi1Mu/sc1 56Nea3aBso1ghvF6G53PO+Q=; b=anw6k/JkVeEm6mwMvBj/X789STNlfvG/zsVM mah+vm7Zc+G/gBBxbyUdkafn7J656TXtFBZgf0jqDOnOunNfCjYv3YEb12WvW76i QcN3B5ZEpklwYjwn97R8d3Gs0ZEqF6pNjnNjvPNgBvNENGOW8E7NgjV8IkgA03t0 ZqzgNFuqRUkbnYfMRZHbPxMe/BtE8fjDP+N59ryPv3pSC7KwrJJmma0Yllr35+Ki bndo9z/7MS9z0fWWrP6nQ0QFOHXLu5yBuBR2MLR/EZQApPHLF9lvo0VFTiXo8Es3 xV7xJMmpSUywzGUfvHOOIrdPoS3R9M3Euz7ddkPAoBB5iXPhRA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vv6c8j5x1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 Jan 2024 23:55:05 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40QNt43R011314 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 Jan 2024 23:55:04 GMT Received: from hu-obabatun-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 26 Jan 2024 15:54:59 -0800 From: Oreoluwa Babatunde To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , Oreoluwa Babatunde Subject: [PATCH 08/46] microblaze: reserved_mem: Implement the new processing order for reserved memory Date: Fri, 26 Jan 2024 15:53:47 -0800 Message-ID: <20240126235425.12233-9-quic_obabatun@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240126235425.12233-1-quic_obabatun@quicinc.com> References: <20240126235425.12233-1-quic_obabatun@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ikUUN6btbAKQUQ66Yukzl8AuOh23gQVJ X-Proofpoint-ORIG-GUID: ikUUN6btbAKQUQ66Yukzl8AuOh23gQVJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-25_14,2024-01-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=881 priorityscore=1501 bulkscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 spamscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401260176 Call early_fdt_scan_reserved_mem() in place of early_init_fdt_scan_reserved_mem() to carry out the first stage of the reserved memory processing only. The early_fdt_scan_reserved_mem() function is used to scan through the DT and mark all the reserved memory regions as reserved or nomap as needed, as well as allocate the memory required by the dynamically-placed reserved memory regions. The second stage of the reserved memory processing is done by fdt_init_reserved_mem(). This function is used to store the information of the statically-placed reserved memory nodes in the reserved_mem array as well as call the region specific initialization function on all the stored reserved memory regions. The call to fdt_init_reserved_mem() is placed after setup_memory() in preparation for the dynamic allocation of the reserved_mem array using memblock. This is because memblock allocated memory is not writable until after the page tables have been setup on the microblaze architecture. Signed-off-by: Oreoluwa Babatunde --- arch/microblaze/kernel/setup.c | 3 +++ arch/microblaze/mm/init.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c index f417333eccae..631faa4613ec 100644 --- a/arch/microblaze/kernel/setup.c +++ b/arch/microblaze/kernel/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -54,6 +55,8 @@ void __init setup_arch(char **cmdline_p) setup_memory(); + fdt_init_reserved_mem(); + console_verbose(); unflatten_device_tree(); diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c index 3827dc76edd8..9e73a1433dfa 100644 --- a/arch/microblaze/mm/init.c +++ b/arch/microblaze/mm/init.c @@ -262,7 +262,7 @@ asmlinkage void __init mmu_init(void) parse_early_param(); - early_init_fdt_scan_reserved_mem(); + early_fdt_scan_reserved_mem(); /* CMA initialization */ dma_contiguous_reserve(memory_start + lowmem_size - 1);