Message ID | 46ef748dd27127ef9b39fa6c97fe51e8d3422a4f.1697199949.git.ysato@users.sourceforge.jp |
---|---|
State | New |
Headers | show |
Series | None | expand |
Hi Sato-san, On Sat, Oct 14, 2023 at 4:54 PM Yoshinori Sato <ysato@users.sourceforge.jp> wrote: > Renesas SuperH binding definition. > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Thanks for your patch! > --- /dev/null > +++ b/Documentation/devicetree/bindings/sh/cpus.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/sh/cpus.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas SuperH CPUs > + > +maintainers: > + - Yoshinori Sato <ysato@users.sourceforge.jp> > + > +description: |+ > + The device tree allows to describe the layout of CPUs in a system through > + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") > + defining properties for every cpu. > + > + Bindings for CPU nodes follow the Devicetree Specification, available from: > + > + https://www.devicetree.org/specifications/ > + > +properties: > + compatible: > + items: > + - enum: Missing - jcore,j2 > + - renesas,sh4 > + - const: renesas,sh I see arch/sh/boot/dts/j2_mimas_v2.dts lacks the fallback to "renesas,sh", though. Is there a common base of instructions that are available on all SH cores? Missing reg property. Missing "device_type: true". > + > + clock-frequency: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + CPU core clock freqency. Perhaps a "clocks" property instead, or as an alternative? On sh7750, you do have clocks = <&cpg SH7750_CPG_ICK>; > + > +required: > + - compatible > + > +additionalProperties: true > + > +examples: > + - | > + cpus { make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/sh/cpus.yaml: Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/cpus.yaml# Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/cpus.yaml# > + cpu: cpu@0 { > + compatible = "renesas,sh4", "renesas,sh"; Documentation/devicetree/bindings/sh/cpus.example.dts:19.28-21.19: Warning (unit_address_vs_reg): /example-0/cpus/cpu@0: node has a unit name, but no reg or ranges property Documentation/devicetree/bindings/sh/cpus.example.dtb: cpus: cpu@0: 'cache-level' is a required property from schema $id: http://devicetree.org/schemas/cpus.yaml# > + }; > + }; > +... Gr{oetje,eeting}s, Geert
diff --git a/Documentation/devicetree/bindings/sh/cpus.yaml b/Documentation/devicetree/bindings/sh/cpus.yaml new file mode 100644 index 000000000000..273df4dfb74e --- /dev/null +++ b/Documentation/devicetree/bindings/sh/cpus.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sh/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH CPUs + +maintainers: + - Yoshinori Sato <ysato@users.sourceforge.jp> + +description: |+ + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every cpu. + + Bindings for CPU nodes follow the Devicetree Specification, available from: + + https://www.devicetree.org/specifications/ + +properties: + compatible: + items: + - enum: + - renesas,sh4 + - const: renesas,sh + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CPU core clock freqency. + +required: + - compatible + +additionalProperties: true + +examples: + - | + cpus { + cpu: cpu@0 { + compatible = "renesas,sh4", "renesas,sh"; + }; + }; +...
Renesas SuperH binding definition. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../devicetree/bindings/sh/cpus.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml