[RFC,v3,17/35] Documentation/devicetree/bindings/interrupt-controller: Add renesas,sh7751-irl-ext.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml
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@@ -0,0 +1,89 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH7751 IRL external encoder with enable regs.
+
+maintainers:
+  - Yoshinori Sato <ysato@users.sourceforge.jp>
+
+description: |
+  This is the generally used external interrupt encoder on SH7751 based boards.
+
+properties:
+  compatible:
+    items:
+      - const: renesas,sh7751-irl-ext
+
+  reg:
+    minItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 1
+
+  '#address-cells':
+    const: 0
+
+  '#size-cells':
+    const: 0
+
+  renesas,width:
+    description: Enable register width
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  renesas,regtype:
+    description: Enable register type
+    $ref: /schemas/types.yaml#/definitions/string
+    oneOf:
+      - description:
+          1 is interrupt enable / 0 is interrupt disable.
+        const: enable
+      - description:
+          1 is interrupt mask / 0 is interrupt unmask.
+        const: mask
+
+  renesas,irqbit:
+    description: IRQ to enable register bit mapping
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+
+
+required:
+  - compatible
+  - reg
+  - interrupt-controller
+  - '#interrupt-cells'
+  - renesas,width
+  - renesas,regtype
+  - renesas,irqbit
+
+additionalProperties: false
+
+examples:
+  - |
+    r2dintc: sh7751irl_encoder@a4000000 {
+        compatible = "renesas,sh7751-irl-ext";
+        reg = <0xa4000000 0x02>;
+        interrupt-controller;
+        #address-cells = <0>;
+        #size-cells = <0>;
+        #interrupt-cells = <1>;
+        renesas,width = <16>;
+        renesas,regtype = "enable";
+        renesas,irqbit =  <11>,         /* PCI INTD */
+                          <9>,          /* CF IDE */
+                          <8>,          /* CF CD */
+                          <12>,         /* PCI INTC */
+                          <10>,         /* SM501 */
+                          <6>,          /* KEY */
+                          <5>,          /* RTC ALARM */
+                          <4>,          /* RTC T */
+                          <7>,          /* SDCARD */
+                          <14>,         /* PCI INTA */
+                          <13>,         /* PCI INTB */
+                          <0>,          /* EXT */
+                          <15>;         /* TP */
+    };