diff mbox series

[08/23] arm64: zynqmp: Add resets property to sdhci nodes

Message ID 8f8592d6454c024c8f8b92e56c9009c65ad1d54a.1683034376.git.michal.simek@amd.com
State Accepted
Commit 6ae507f09e29ae2f492b9c4cec97aad1f84aa8ab
Headers show
Series arm64: zynqmp: Misc zynqmp changes | expand

Commit Message

Michal Simek May 2, 2023, 1:35 p.m. UTC 
From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>

Add "resets" property to sdhci nodes. Resets property is used to reset the
SD host controller when dynamic configuration support is enabled.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 2 ++
 1 file changed, 2 insertions(+)

Comments

Michal Simek May 16, 2023, 10:56 a.m. UTC | #1 
On 5/10/23 09:02, Laurent Pinchart wrote:
> Hi Michal,
> 
> Thank you for the patch.
> 
> On Tue, May 02, 2023 at 03:35:36PM +0200, Michal Simek wrote:
>> From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
>>
>> Add "resets" property to sdhci nodes. Resets property is used to reset the
>> SD host controller when dynamic configuration support is enabled.
>>
>> Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
> 
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Applied.
M
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index a117294dc890..7bd3e816226a 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -755,6 +755,7 @@  sdhci0: mmc@ff160000 {
 			#clock-cells = <1>;
 			clock-output-names = "clk_out_sd0", "clk_in_sd0";
 			power-domains = <&zynqmp_firmware PD_SD_0>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>;
 		};
 
 		sdhci1: mmc@ff170000 {
@@ -768,6 +769,7 @@  sdhci1: mmc@ff170000 {
 			#clock-cells = <1>;
 			clock-output-names = "clk_out_sd1", "clk_in_sd1";
 			power-domains = <&zynqmp_firmware PD_SD_1>;
+			resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>;
 		};
 
 		smmu: iommu@fd800000 {