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[95.245.235.245]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a17d7a7sm17107364f8f.32.2025.01.29.03.05.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jan 2025 03:05:05 -0800 (PST) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Wed, 29 Jan 2025 12:03:05 +0100 Subject: [PATCH v3 04/10] iio: adc: ad7606: move the software mode configuration Precedence: bulk X-Mailing-List: linux-fbdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-4-c3aec77c0ab7@baylibre.com> References: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-0-c3aec77c0ab7@baylibre.com> In-Reply-To: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-0-c3aec77c0ab7@baylibre.com> To: Michael Hennerich , Lars-Peter Clausen , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandru Ardelean , David Lechner Cc: Jonathan Cameron , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Stols , Angelo Dureghello X-Mailer: b4 0.14.1 From: Guillaume Stols This is a preparation for the intoduction of the sofware functions in the iio backend version of the driver. The software mode configuration must be executed once the channels are configured, and the number of channels is known. This is not the case before iio-backend's configuration is called, and iio backend version of the driver does not have a timestamp channel. Also the sw_mode_config callback is configured during the iio-backend configuration. For clarity purpose, I moved the entire block instead of just the concerned function calls. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index d39354afd539..376c808df11c 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -1246,17 +1246,6 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, return -ERESTARTSYS; } - st->write_scale = ad7606_write_scale_hw; - st->write_os = ad7606_write_os_hw; - - ret = ad7606_sw_mode_setup(indio_dev); - if (ret) - return ret; - - ret = ad7606_chan_scales_setup(indio_dev); - if (ret) - return ret; - /* If convst pin is not defined, setup PWM. */ if (!st->gpio_convst) { st->cnvst_pwm = devm_pwm_get(dev, NULL); @@ -1334,6 +1323,17 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, return ret; } + st->write_scale = ad7606_write_scale_hw; + st->write_os = ad7606_write_os_hw; + + ret = ad7606_sw_mode_setup(indio_dev); + if (ret) + return ret; + + ret = ad7606_chan_scales_setup(indio_dev); + if (ret) + return ret; + return devm_iio_device_register(dev, indio_dev); } EXPORT_SYMBOL_NS_GPL(ad7606_probe, "IIO_AD7606");