| Message ID | 20240115130817.88456-1-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| Headers | show |
| Series | Add missing port pins for RZ/Five SoC | expand |
Hi Geert, On Mon, Jan 15, 2024 at 1:08 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Hi All, > > This patch series intends to incorporate the absent port pins P19 to P28, > which are exclusively available on the RZ/Five SoC. > > Cheers, > Prabhakar > > v4 -> v5: > * Made struct rzg2l_variable_pin_cfg variables u32 > * Updated PIN_CFG_PIN_MAP_MASK macro to use GENMASK_ULL() as reported > by kernel test robot. > > v3 -> v4: > * Rebased the changes on top Claudiu's patches > * patch 1/4 is new patch for using FIELD_PREP_CONST/FIELD_GET as > suggested by Geert > * patch 2/4 adjusted the code again using FIELD_PREP_CONST/FIELD_GET > * patch 3/4 fixed rzg2l_pinctrl_get_variable_pin_cfg() as pointed by Geert > * patch 4/4 is unchanged > * patches 1-3 have been boot tested on g2l family > > v2->v3: > * Fixed build warnings for m68k as reported by Kernel test robot. > > RFC -> v2: > * Fixed review comments pointed by Geert & Biju > > RFC: > Link: https://lore.kernel.org/lkml/20230630120433.49529-3-prabhakar.mahadev-lad.rj@bp.renesas.com/T/ > > > Lad Prabhakar (4): > pinctrl: renesas: rzg2l: Improve code for readability > pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() > macro > pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 > riscv: dts: renesas: r9a07g043f: Update gpio-ranges property > > arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 + > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 284 +++++++++++++++++--- > 2 files changed, 248 insertions(+), 40 deletions(-) > With recent changes to pinctrl-rzg2l.c this patch series (patch #2) does not apply cleanly anymore. Shall I resend it? Cheers, Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Hi All, This patch series intends to incorporate the absent port pins P19 to P28, which are exclusively available on the RZ/Five SoC. Cheers, Prabhakar v4 -> v5: * Made struct rzg2l_variable_pin_cfg variables u32 * Updated PIN_CFG_PIN_MAP_MASK macro to use GENMASK_ULL() as reported by kernel test robot. v3 -> v4: * Rebased the changes on top Claudiu's patches * patch 1/4 is new patch for using FIELD_PREP_CONST/FIELD_GET as suggested by Geert * patch 2/4 adjusted the code again using FIELD_PREP_CONST/FIELD_GET * patch 3/4 fixed rzg2l_pinctrl_get_variable_pin_cfg() as pointed by Geert * patch 4/4 is unchanged * patches 1-3 have been boot tested on g2l family v2->v3: * Fixed build warnings for m68k as reported by Kernel test robot. RFC -> v2: * Fixed review comments pointed by Geert & Biju RFC: Link: https://lore.kernel.org/lkml/20230630120433.49529-3-prabhakar.mahadev-lad.rj@bp.renesas.com/T/ Lad Prabhakar (4): pinctrl: renesas: rzg2l: Improve code for readability pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 riscv: dts: renesas: r9a07g043f: Update gpio-ranges property arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 + drivers/pinctrl/renesas/pinctrl-rzg2l.c | 284 +++++++++++++++++--- 2 files changed, 248 insertions(+), 40 deletions(-)