From patchwork Wed Mar 14 05:11:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Katsuhiro Suzuki X-Patchwork-Id: 131543 Delivered-To: patch@linaro.org Received: by 10.46.84.17 with SMTP id i17csp414439ljb; Tue, 13 Mar 2018 22:11:49 -0700 (PDT) X-Google-Smtp-Source: AG47ELul/nnH8hJQQjwxbw8Af3C/BxyTqQBOgQJ8MWrHxz52hZSvkAHxOPyKeJtiaaPV6TlbbPgf X-Received: by 10.99.42.83 with SMTP id q80mr2600765pgq.115.1521004309496; Tue, 13 Mar 2018 22:11:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521004309; cv=none; d=google.com; s=arc-20160816; b=y/07csFpX315ylg07oFWdZRshst9K36hLnyIXAhSE2FA/4aWnka2BEG/YT0Z959DDJ xRsb2BX6Ebirj09aL3iYl1p1RvbNFrVlukYezLt4y5CD8Jq8OQjTgfsJD5eA0HxAQNX5 VI2nNNX/QrJTfPvhfNrynfMty0wolDFIoe5xKXdYWDCEATcnjOj977j2OO/9ltKz2Rdu n9EoGKMSpcun/yxYV7eQ1V4yW3VVRxLFVWqpnUBMCFM23HPbHGZM6yhF5U27jrQKKzSy JHrdb1EqpCA07rLDdUnhnhsa8Yfzs3weXIoIMmbOyDF1tZB4afJ4+xBVYz995jxNpIbR PUPQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=z9/3EJfMdMQHAcSlRwU5SRPVkWiydnN4c9d6YPoEcFM=; b=kAh4T0HaZEsMcmHvTUUS+Sr932vH3Mwvppmbzgduc969SVIJpd1tGm/K0kTGsQhKGV mLB2D8XmTFhy7WYh2X3ljZdjjXpXnF6LxyKoj2Cosd+PN8BAfhSSReDpm/kcVXWyAe7S dQSdzGJlCPes94tCq24ZtrafniSay7HWSdAQImmgaKTp/6V6jw1kH7PKew6WXSdbK+6x A9xJ7EPm4je67SDujFmW8bRr0Jgco/OuUWd12fqSaGNJRRFVTwomfwLj+btFbyg1Teav wb/IXw26xpYNJBudp2UKF8WBm8++kPbrNSXyiXlikXM6+FzBq4CcXrZ/4PFPGYGWcGhH a8dA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f3si1269690pgu.783.2018.03.13.22.11.49; Tue, 13 Mar 2018 22:11:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751302AbeCNFLs (ORCPT + 5 others); Wed, 14 Mar 2018 01:11:48 -0400 Received: from mx.socionext.com ([202.248.49.38]:50325 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750998AbeCNFLr (ORCPT ); Wed, 14 Mar 2018 01:11:47 -0400 Received: from unknown (HELO iyokan-ex.css.socionext.com) ([172.31.9.54]) by mx.socionext.com with ESMTP; 14 Mar 2018 14:11:46 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by iyokan-ex.css.socionext.com (Postfix) with ESMTP id 26D6F6006F; Wed, 14 Mar 2018 14:11:46 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Wed, 14 Mar 2018 14:12:28 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by iyokan.css.socionext.com (Postfix) with ESMTP id 99C8A4037B; Wed, 14 Mar 2018 14:11:45 +0900 (JST) Received: from aegis.e01.socionext.com (unknown [10.213.134.210]) by yuzu.css.socionext.com (Postfix) with ESMTP id 6C9AE12042A; Wed, 14 Mar 2018 14:11:45 +0900 (JST) From: Katsuhiro Suzuki To: linux-gpio@vger.kernel.org, Linus Walleij , Masahiro Yamada , linux-arm-kernel@lists.infradead.org Cc: Masami Hiramatsu , Jassi Brar , linux-kernel@vger.kernel.org, Katsuhiro Suzuki Subject: [PATCH] pinctrl: uniphier: add PXs2 Audio in/out pin-mux settings Date: Wed, 14 Mar 2018 14:11:37 +0900 Message-Id: <20180314051137.6091-1-suzuki.katsuhiro@socionext.com> X-Mailer: git-send-email 2.16.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The UniPhier PXs2 SoC audio core use following 25 pins: ain1 : 2ch I2S input : AI1ADCCK, AI1BCK, AI1D0, AI1LRCK ain2 : 8ch I2S input : AI2ADCCK, AI2BCK, AI2D[0-3], AI2LRCK ainiec1 : S/PDIF input : XIRQ17 (for AO1IEC) aout2 : 8ch I2S output: AO2BCK, AO2D0, AO2DACCK, AO2LRCK PORT226, 227, 230 (for AO2D[1-3]) aout3 : 2ch I2S output: AO3BCK, AO3DMIX, AO3DACCK, AO3LRCK aoutiec1: S/PDIF output : PORT132(for AO1IEC) aoutiec2: S/PDIF output : AO2IEC Signed-off-by: Katsuhiro Suzuki --- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 35 ++++++++++++++++++++++++ 1 file changed, 35 insertions(+) -- 2.16.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index c0ef40ae99a7..f0a4cfc00160 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c @@ -728,6 +728,20 @@ static const struct pinctrl_pin_desc uniphier_pxs2_pins[] = { 234, UNIPHIER_PIN_PULL_DOWN), }; +static const unsigned ain1_pins[] = {161, 162, 173, 174}; +static const int ain1_muxvals[] = {8, 8, 8, 8}; +static const unsigned ain2_pins[] = {98, 99, 100, 101, 102, 103, 104}; +static const int ain2_muxvals[] = {8, 8, 8, 8, 8, 8, 8}; +static const unsigned ainiec1_pins[] = {91}; +static const int ainiec1_muxvals[] = {11}; +static const unsigned aout2_pins[] = {175, 176, 177, 178, 183, 184, 185}; +static const int aout2_muxvals[] = {8, 8, 8, 8, 9, 9, 9}; +static const unsigned aout3_pins[] = {105, 106, 107, 108}; +static const int aout3_muxvals[] = {8, 8, 8, 8}; +static const unsigned aoutiec1_pins[] = {95}; +static const int aoutiec1_muxvals[] = {11}; +static const unsigned aoutiec2_pins[] = {97}; +static const int aoutiec2_muxvals[] = {8}; static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42}; static const int emmc_muxvals[] = {9, 9, 9, 9, 9, 9, 9}; static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46}; @@ -824,6 +838,13 @@ static const unsigned int gpio_range1_pins[] = { }; static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { + UNIPHIER_PINCTRL_GROUP(ain1), + UNIPHIER_PINCTRL_GROUP(ain2), + UNIPHIER_PINCTRL_GROUP(ainiec1), + UNIPHIER_PINCTRL_GROUP(aout2), + UNIPHIER_PINCTRL_GROUP(aout3), + UNIPHIER_PINCTRL_GROUP(aoutiec1), + UNIPHIER_PINCTRL_GROUP(aoutiec2), UNIPHIER_PINCTRL_GROUP(emmc), UNIPHIER_PINCTRL_GROUP(emmc_dat8), UNIPHIER_PINCTRL_GROUP(ether_mii), @@ -854,6 +875,13 @@ static const struct uniphier_pinctrl_group uniphier_pxs2_groups[] = { UNIPHIER_PINCTRL_GROUP_GPIO(gpio_range1), }; +static const char * const ain1_groups[] = {"ain1"}; +static const char * const ain2_groups[] = {"ain2"}; +static const char * const ainiec1_groups[] = {"ainiec1"}; +static const char * const aout2_groups[] = {"aout2"}; +static const char * const aout3_groups[] = {"aout3"}; +static const char * const aoutiec1_groups[] = {"aoutiec1"}; +static const char * const aoutiec2_groups[] = {"aoutiec2"}; static const char * const emmc_groups[] = {"emmc", "emmc_dat8"}; static const char * const ether_mii_groups[] = {"ether_mii"}; static const char * const ether_rgmii_groups[] = {"ether_rgmii"}; @@ -878,6 +906,13 @@ static const char * const usb2_groups[] = {"usb2"}; static const char * const usb3_groups[] = {"usb3"}; static const struct uniphier_pinmux_function uniphier_pxs2_functions[] = { + UNIPHIER_PINMUX_FUNCTION(ain1), + UNIPHIER_PINMUX_FUNCTION(ain2), + UNIPHIER_PINMUX_FUNCTION(ainiec1), + UNIPHIER_PINMUX_FUNCTION(aout2), + UNIPHIER_PINMUX_FUNCTION(aout3), + UNIPHIER_PINMUX_FUNCTION(aoutiec1), + UNIPHIER_PINMUX_FUNCTION(aoutiec2), UNIPHIER_PINMUX_FUNCTION(emmc), UNIPHIER_PINMUX_FUNCTION(ether_mii), UNIPHIER_PINMUX_FUNCTION(ether_rgmii),