From patchwork Tue Mar 29 15:29:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 555044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 346D0C4167B for ; Tue, 29 Mar 2022 15:29:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238605AbiC2PbC (ORCPT ); Tue, 29 Mar 2022 11:31:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238585AbiC2Pa7 (ORCPT ); Tue, 29 Mar 2022 11:30:59 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE487F8962; Tue, 29 Mar 2022 08:29:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648567756; x=1680103756; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fCKfKSD0iyV78apRqDWQhujTsUEBgiS/rWxFJUbLX2w=; b=JYETm3ewTbChAu60nzmVqY64uYM2q4Qt7ZXICT58LGvzF5cAfzTpmCOh M9jeNIU/T0hqg5xDmNNtn7w3D7wOUJjnwsql8ecgksFuof4yqGnrsF6GN IiDD7gQLg1Iq3V1dO0tKZxDvY6fs4Q8MH4o6RBQicdXp9WruiOY6++Czl 4YSmX+sXXS9VnxDos2JYIUJiS+yoxX6R4ls6017JbZlGLtsgBnFv3WgJH qV0Vvit/mkYLQwaHTnRdn2HODPVHTkwyoK2TdAt2Exrgt2VbNxmNJ4ciV wqMQJGMkFakoG91DHJAOixjmNhlTgvrILK/koQg5MtA01MTSJLrzm7e9j g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="284176812" X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="284176812" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Mar 2022 08:29:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,220,1643702400"; d="scan'208";a="521478476" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 29 Mar 2022 08:29:08 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 259551DD; Tue, 29 Mar 2022 18:29:29 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Krzysztof Kozlowski , Fabien Dessenne , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Linus Walleij , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Geert Uytterhoeven , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v2 03/13] pinctrl: stm32: Replace custom code by gpiochip_node_count() call Date: Tue, 29 Mar 2022 18:29:16 +0300 Message-Id: <20220329152926.50958-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> References: <20220329152926.50958-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Fabien Dessenne --- drivers/pinctrl/stm32/pinctrl-stm32.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 92348e09af28..4043a44211f0 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -1423,7 +1423,8 @@ int stm32_pctl_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct stm32_pinctrl *pctl; struct pinctrl_pin_desc *pins; - int i, ret, hwlock_id, banks = 0; + int i, ret, hwlock_id; + unsigned int banks; if (!np) return -EINVAL; @@ -1513,10 +1514,7 @@ int stm32_pctl_probe(struct platform_device *pdev) return PTR_ERR(pctl->pctl_dev); } - for_each_available_child_of_node(np, child) - if (of_property_read_bool(child, "gpio-controller")) - banks++; - + banks = gpiochip_node_count(dev); if (!banks) { dev_err(dev, "at least one GPIO bank is required\n"); return -EINVAL;