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AJvYcCV+9MJeM1c90+m0NJINXONp71Jz1UWZmw2zFfE26cPhek0WQ73EE8KDsxI2lEoUePbFdsq3oo/vZB803IfgtOaHS47Zt07ZGGywg5rvC8n7DjjYNCjz/vFIpPFcI25Oyc3gy/sofJUIF5ydPKWTXotpo3Lc9dADTIIf5vlQXeeVy1xFwIahoNEfP3OO X-Gm-Message-State: AOJu0Yw2eOFKCUKrgMi6GN/4U/EYxv8C0Cs22NFCOXVOo5gnKym6QRyu CYIzPY+5zbSVyhAaXC61oLzlbvnvBCxYP//a9LBQAlZnmRbz+OA+ X-Google-Smtp-Source: AGHT+IHNLUXedQfoGfcBwbl0iKJA+aaqKG0F6TiEyHRmg7KQJrlIPREFvWynPkBiGD2HU6MTj0CTGw== X-Received: by 2002:a05:600c:46c8:b0:414:d95:cc47 with SMTP id q8-20020a05600c46c800b004140d95cc47mr1456wmo.30.1713895160037; Tue, 23 Apr 2024 10:59:20 -0700 (PDT) Received: from prasmi.home ([2a00:23c8:2500:a01:cef0:9ed3:1428:f85f]) by smtp.gmail.com with ESMTPSA id fl5-20020a05600c0b8500b0041abeaaf7f0sm2808145wmb.28.2024.04.23.10.59.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Apr 2024 10:59:19 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , linux-renesas-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 04/13] pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures Date: Tue, 23 Apr 2024 18:58:51 +0100 Message-Id: <20240423175900.702640-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240423175900.702640-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240423175900.702640-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Enable parsing of variable configuration for all architectures. This patch is in preparation for adding support for the RZ/V2H SoC, which utilizes the ARM64 architecture and features port pins with variable configuration. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- RFC->v2 - No change --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 9bb9cc63f9df..c944d94b9a36 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -322,7 +322,6 @@ struct rzg2l_pinctrl { static const u16 available_ps[] = { 1800, 2500, 3300 }; -#ifdef CONFIG_RISCV static u64 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, u64 pincfg, unsigned int port, @@ -339,6 +338,7 @@ static u64 rzg2l_pinctrl_get_variable_pin_cfg(struct rzg2l_pinctrl *pctrl, return 0; } +#ifdef CONFIG_RISCV static const struct rzg2l_variable_pin_cfg r9a07g043f_variable_pin_cfg[] = { { .port = 20, @@ -2299,13 +2299,11 @@ static int rzg2l_pinctrl_register(struct rzg2l_pinctrl *pctrl) if (i && !(i % RZG2L_PINS_PER_PORT)) j++; pin_data[i] = pctrl->data->port_pin_configs[j]; -#ifdef CONFIG_RISCV if (pin_data[i] & PIN_CFG_VARIABLE) pin_data[i] = rzg2l_pinctrl_get_variable_pin_cfg(pctrl, pin_data[i], j, i % RZG2L_PINS_PER_PORT); -#endif pins[i].drv_data = &pin_data[i]; }