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AJvYcCURSOGaU7Gf45kAF4BNenFJcDvOnOS+n5dDAsb7HcQL63+M18r6Zt3K+m0oAwSZgebee1YbBwlnFAHxVtDBbiF05R8=@vger.kernel.org, AJvYcCXQS5o3IIPhZnNisEzCBvJld+y4fgx5w2QY0CAp0HdgYDJ53mfTX9ereSla0f0LeR5Gq8ohutDhg2ZoDg==@vger.kernel.org, AJvYcCXrmtJVdw095GgwIyx2Gh8SIQGAPf4H9kC3AOHiqv54GRslSTrlevlwL7wzfm2M6x3e4UXbYakIE5ES@vger.kernel.org X-Gm-Message-State: AOJu0YzjlE/nAw+pmncY1C8tkTAzF7HA+6lA0JUhXqrUOu1M8tlNFFVj L2H1ny9Z+IEu0c4vNE/s0XvAGh8Mh/nZ74mzGmfMbG3keaKqY+Op X-Google-Smtp-Source: AGHT+IHF3uHJVQSxTwd1vYN7/F7NMlJGf3tji3sMkD5x4WMambZBC1tgq4hWMiEv6G7gONyvJpD1nw== X-Received: by 2002:adf:f98a:0:b0:37d:39aa:b9f4 with SMTP id ffacd0b85a97d-37d551d416emr14822235f8f.26.1729165194601; Thu, 17 Oct 2024 04:39:54 -0700 (PDT) Received: from prasmi.Home ([2a02:c7c:e309:f400:f6f5:4306:392d:908d]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d7fbf82b1sm7060399f8f.72.2024.10.17.04.39.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Oct 2024 04:39:53 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Linus Walleij , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 5/7] pinctrl: renesas: rzg2l: Drop calling rzg2l_gpio_request() Date: Thu, 17 Oct 2024 12:39:40 +0100 Message-ID: <20241017113942.139712-6-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241017113942.139712-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Drop calling rzg2l_gpio_request() in rzg2l_gpio_interrupt_input_mode() this was added to handle special case of bootloader setting the same gpio pin as function. When GPIO pin is requested as interrupt through `gpios` DT property the gpio_request() is called through the code path and when releasing GPIO pin it goes through the gpio_free() path, so drop calling gpio_request() in rzg2l_gpio_child_to_parent_hwirq() path and also drop rzg2l_gpio_free() in rzg2l_gpio_irq_domain_free(). This fixes case where rzg2l_gpio_free() was being called twice after the GPIO interrupt pin is freed (after unbinding the module). When GPIO pin is requested as interrupt through `interrupt` DT property this doesn't go through gpio_request()/gpio_free() code path. Signed-off-by: Lad Prabhakar --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 33 +++---------------------- 1 file changed, 3 insertions(+), 30 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index d8b942fbf537..b9a8bf43a92a 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2372,26 +2372,6 @@ static const struct irq_chip rzg2l_gpio_irqchip = { GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -static int rzg2l_gpio_interrupt_input_mode(struct gpio_chip *chip, unsigned int offset) -{ - struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip); - const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset]; - u64 *pin_data = pin_desc->drv_data; - u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data); - u8 bit = RZG2L_PIN_ID_TO_PIN(offset); - u8 reg8; - int ret; - - reg8 = readb(pctrl->base + PMC(off)); - if (reg8 & BIT(bit)) { - ret = rzg2l_gpio_request(chip, offset); - if (ret) - return ret; - } - - return rzg2l_gpio_direction_input(chip, offset); -} - static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, unsigned int child, unsigned int child_type, @@ -2407,17 +2387,15 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, if (gpioint < 0) return gpioint; - ret = rzg2l_gpio_interrupt_input_mode(gc, child); + ret = rzg2l_gpio_direction_input(gc, child); if (ret) return ret; spin_lock_irqsave(&pctrl->bitmap_lock, flags); irq = bitmap_find_free_region(pctrl->tint_slot, RZG2L_TINT_MAX_INTERRUPT, get_order(1)); spin_unlock_irqrestore(&pctrl->bitmap_lock, flags); - if (irq < 0) { - ret = -ENOSPC; - goto err; - } + if (irq < 0) + return -ENOSPC; rzg2l_gpio_irq_endisable(pctrl, child, true); pctrl->hwirq[irq] = child; @@ -2427,10 +2405,6 @@ static int rzg2l_gpio_child_to_parent_hwirq(struct gpio_chip *gc, *parent_type = IRQ_TYPE_LEVEL_HIGH; *parent = RZG2L_PACK_HWIRQ(gpioint, irq); return 0; - -err: - rzg2l_gpio_free(gc, child); - return ret; } static void rzg2l_gpio_irq_restore(struct rzg2l_pinctrl *pctrl) @@ -2494,7 +2468,6 @@ static void rzg2l_gpio_irq_domain_free(struct irq_domain *domain, unsigned int v for (i = 0; i < RZG2L_TINT_MAX_INTERRUPT; i++) { if (pctrl->hwirq[i] == hwirq) { rzg2l_gpio_irq_endisable(pctrl, hwirq, false); - rzg2l_gpio_free(gc, hwirq); spin_lock_irqsave(&pctrl->bitmap_lock, flags); bitmap_release_region(pctrl->tint_slot, i, get_order(1)); spin_unlock_irqrestore(&pctrl->bitmap_lock, flags);