From patchwork Wed Dec 11 06:47:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 849447 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87F461C5496; Wed, 11 Dec 2024 06:48:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733899689; cv=none; b=Gr2HD1tRCOpWvhU54GCVoHBG2kStbKcYaNMfcOoUbT41N+lTkZcwpBp5x3nYNteX3mXd/zxJPsIxV3URpqNC4srJ/peuWR2gT+THEEDmeMgfPz9O5m0r/Ot3whBrF8E6ozMDsbWLMFkaBo6sqPLJd+BNejwis4YkSwXGayhRmqQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1733899689; c=relaxed/simple; bh=UPPnlWPu9KoNlNpvsqGTfPyBQbXQZd4qU+Jb/czZ7/A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KuvLduEI4WLlW2SBGk2euWoEnqUiBuB844e7YVzeFWOjiprTTbuSIJZ0FdDL/XW8B6sOPBrMTL+K7GGK2b5i9ScDYZoua8xfYoBsTEPVLr7MS5BVW22b+mN+bFijDK2L5qo3mPrI5OsSKgQTF/V9ayWX+QrWsM3KXh+dlIvNPF4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lVzI0Alg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lVzI0Alg" Received: by smtp.kernel.org (Postfix) with ESMTPS id 21097C4AF0C; Wed, 11 Dec 2024 06:48:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1733899689; bh=UPPnlWPu9KoNlNpvsqGTfPyBQbXQZd4qU+Jb/czZ7/A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lVzI0Algq+XTOAf/dYDHZb1kI7b3r7XQ2Qhixv6gouPmJBqrx/IhUObZRNdUrZGVb ugFaymGbSB6Oxv6oFu5lSHWOi0QRCHbu6yZojlcvu8baXMi0Tw/bZmpKKO4rGrCaxC pYNVLM42CfqaiQU9QPPLjlkUspBmlptdF0t8zuVtuaK0G9ODHAiVee7LqhmhnpMCrN CZ5zWLazfue4AK1WZLzBg3NqY5QT8JWHVPfqkBSoyUCfmutiQWuN9/myG3bRED4UqU PQ+STpDvXXvH3vIBf7E2WlkyNPpAjCmHiEkTp4njDXX2G17+XqPRiTVYiBJQYpohcI sGD4A4netMulg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 112EFE77183; Wed, 11 Dec 2024 06:48:09 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 11 Dec 2024 14:47:51 +0800 Subject: [PATCH RFC 3/3] arm64: dts: amlogic: a4: add pinctrl node Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241211-amlogic-pinctrl-v1-3-410727335119@amlogic.com> References: <20241211-amlogic-pinctrl-v1-0-410727335119@amlogic.com> In-Reply-To: <20241211-amlogic-pinctrl-v1-0-410727335119@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1733899686; l=4294; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=wd2xEkVGIb+QQGNlpn9fPOzOszeVPGCMX5Z9RWeBF+M=; b=V4CFjbseLot8PdTVnt01ycVpwibk0w7BRAlIO9BREobCH/cbUT9/dccE5TNzvbad920xz3xTq s+Cse5B+iI3AcJLNHYnZKdsjFDFM1RhjPRWGZUwmwwqX1JaULRCXsW2 X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add pinctrl device to support Amlogic A4 and add uart pinconf. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 146 ++++++++++++++++++++++++++++ 1 file changed, 146 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi index de10e7aebf21..fccae7c9758a 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -5,6 +5,7 @@ #include "amlogic-a4-common.dtsi" #include +#include / { cpus { #address-cells = <2>; @@ -48,3 +49,148 @@ pwrc: power-controller { }; }; }; + +&apb { + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,pinctrl"; + reg = <0x0 0x4000 0x0 0x0050>, + <0x0 0x40c0 0x0 0x0220>; + reg-names = "mux", "gpio"; + #address-cells = <2>; + #size-cells = <2>; + + gpiob: gpiob { + gpio-controller; + #gpio-cells = <2>; + npins = <14>; + bank-index = ; + reg-mux-offset = <0>; + reg-gpio-offset = <0x60>; + bank-name = "GPIOB"; + }; + + gpiod: gpiod { + gpio-controller; + #gpio-cells = <2>; + npins = <16>; + bank-index = ; + reg-mux-offset = <0x10>; + reg-gpio-offset = <0x30>; + bank-name = "GPIOD"; + }; + + gpioe: gpioe { + gpio-controller; + #gpio-cells = <2>; + npins = <2>; + bank-index = ; + reg-mux-offset = <0x12>; + reg-gpio-offset = <0x40>; + bank-name = "GPIOE"; + }; + + gpiot: gpiot { + gpio-controller; + #gpio-cells = <2>; + npins = <23>; + bank-index = ; + reg-mux-offset = <0xb>; + reg-gpio-offset = <0x20>; + bank-name = "GPIOT"; + }; + + gpiox: gpiox { + gpio-controller; + #gpio-cells = <2>; + npins = <18>; + bank-index = ; + reg-mux-offset = <0x3>; + reg-gpio-offset = <0x10>; + bank-name = "GPIOX"; + }; + + func-uart-a { + uart_a_default: uart-a-pins1{ + pinmux= , + , + , + ; + }; + + uart-a-pins2{ + pinmux= , + ; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + func-uart-b { + uart_b_default: uart-b-default{ + pinmux= , + ; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + func-uart-d { + uart_d_default: uart-d-pins1{ + pinmux= , + ; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + + uart-d-pins2{ + pinmux= , + , + , + ; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + func-uart-e { + uart_e_default: uart-e-pins{ + pinmux= , + , + , + ; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + }; + + aobus_pinctrl: pinctrl@8e700 { + compatible = "amlogic,pinctrl"; + reg = <0x0 0x8e700 0x0 0x04>, + <0x0 0x8e704 0x0 0x60>; + reg-names = "mux", "gpio"; + #address-cells = <2>; + #size-cells = <2>; + + gpioao: gpioao { + gpio-controller; + #gpio-cells = <2>; + npins = <7>; + bank-index = ; + reg-mux-offset = <0>; + reg-gpio-offset = <0>; + bank-name = "GPIOAO"; + }; + + test_n: gpiotestn { + gpio-controller; + #gpio-cells = <2>; + npins = <1>; + bank-index = ; + reg-mux-offset = <0>; + bit-mux-offset = <28>; + reg-gpio-offset = <0x10>; + bank-name = "TEST_N"; + }; + }; +};