From patchwork Fri Feb 21 10:14:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 867555 Received: from smtp-42ae.mail.infomaniak.ch (smtp-42ae.mail.infomaniak.ch [84.16.66.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D7A9204F79 for ; Fri, 21 Feb 2025 10:14:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=84.16.66.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740132885; cv=none; b=m0fA6bo4IFlDN2cmpvH43GBOawVti6MK81ceajLPQTEXO+PL/Zi74u1G9srpGUr8BczILpLip9vr6A5QxDxcD7erBBLMynehm4+7U94pXI9PrlC3X+FpmMD3UutYEnssKVYATDJwu3Y+v1C7/8x+wYazTLoDNXZkUwcRQ3huF9o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740132885; c=relaxed/simple; bh=s6kvTlBWs3QTc69KNC5Ob0gAjwaprTQipz5QovyifGg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UaBknTzbZXH+Ehk9JVVEvIiqhWLRIjYQYSNEw8cS5uEZNb3X5x27mXSfbmjcTS/+EyfqzMvNVHN9MtrDrLc+eiug7FTxY1hbfi+4g7NEtjAdg4Oi7O5R4Y3EqvV/Ui2lk/ewIQwUHRvkolxuGgIlRm/+pPcce2TOVgjkTTQ5RmA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=84.16.66.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0000.mail.infomaniak.ch (smtp-3-0000.mail.infomaniak.ch [10.4.36.107]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4YzmFr4N0wz4Fy; Fri, 21 Feb 2025 11:14:40 +0100 (CET) Received: from unknown by smtp-3-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4YzmFr0MTFzJSZ; Fri, 21 Feb 2025 11:14:40 +0100 (CET) From: Quentin Schulz Date: Fri, 21 Feb 2025 11:14:26 +0100 Subject: [PATCH v2 1/2] dt-bindings: gpio: nxp,pcf8575: add reset GPIO Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250221-pca976x-reset-driver-v2-1-a2bcb9fdc256@cherry.de> References: <20250221-pca976x-reset-driver-v2-0-a2bcb9fdc256@cherry.de> In-Reply-To: <20250221-pca976x-reset-driver-v2-0-a2bcb9fdc256@cherry.de> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurent Pinchart Cc: Heiko Stuebner , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz A few of the I2C GPIO expander chips supported by this binding have a RESETN pin to be able to reset the chip. The chip is held in reset while the pin is low, therefore the polarity of reset-gpios is expected to reflect that, i.e. a GPIO_ACTIVE_HIGH means the GPIO will be driven high for reset and then driven low, GPIO_ACTIVE_LOW means the GPIO will be driven low for reset and then driven high. If a GPIO is directly routed to RESETN pin on the IC without any inverter, GPIO_ACTIVE_LOW is thus expected. Out of the supported chips, only PCA9670, PCA9671, PCA9672 and PCA9673 show a RESETN pin in their datasheets. They all share the same reset timings, that is 4+us reset pulse[0] and 100+us reset time[0]. When performing a reset, "The PCA9670 registers and I2C-bus state machine will be held in their default state until the RESET input is once again HIGH."[1] meaning we now know the state of each line controlled by the GPIO expander. Therefore, setting lines-initial-states and reset-gpios both does not make sense and their presence is XOR'ed. [0] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf Fig 22. [1] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf 8.5 Tested-by: Heiko Stuebner # exclusion logic Signed-off-by: Quentin Schulz --- .../devicetree/bindings/gpio/nxp,pcf8575.yaml | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml index 3718103e966a13e1d77f73335ff73c18a3199469..633ac5cfa04a10bcbb748b6580938cddae9e5596 100644 --- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml +++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml @@ -73,6 +73,44 @@ properties: wakeup-source: true + reset-gpios: + maxItems: 1 + description: + GPIO controlling the (reset active LOW) RESET# pin. + + The active polarity of the GPIO must translate to the low state + of the RESET# pin on the IC, i.e. if a GPIO is directly routed + to the RESET# pin without any inverter, GPIO_ACTIVE_LOW is + expected. + + Performing a reset makes all lines initialized to their input (pulled-up) + state. + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - nxp,pca9670 + - nxp,pca9671 + - nxp,pca9672 + - nxp,pca9673 + then: + properties: + reset-gpios: false + + # lines-initial-states XOR reset-gpios + # Performing a reset reinitializes all lines to a known state which + # may not match passed lines-initial-states + - if: + required: + - lines-initial-states + then: + properties: + reset-gpios: false + patternProperties: "^(.+-hog(-[0-9]+)?)$": type: object