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[93.34.88.225]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-3a4e8bc377asm233366f8f.72.2025.05.27.15.21.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 May 2025 15:21:14 -0700 (PDT) From: Christian Marangi To: Lorenzo Bianconi , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Benjamin Larsson , linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Christian Marangi Subject: [PATCH 5/6] dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller Date: Wed, 28 May 2025 00:20:37 +0200 Message-ID: <20250527222040.32000-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250527222040.32000-1-ansuelsmth@gmail.com> References: <20250527222040.32000-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document Airoha AN7583 Pin Controller based on Airoha EN7581 with some minor difference on some function group. Make the PHY LEDs, pcie_reset and PCM SPI function dependent of the compatible and define the different group for AN7583. Signed-off-by: Christian Marangi --- .../pinctrl/airoha,en7581-pinctrl.yaml | 297 ++++++++++++------ 1 file changed, 207 insertions(+), 90 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml index 21fd4f1ba78b..38511ad2f9e6 100644 --- a/Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/airoha,en7581-pinctrl.yaml @@ -4,17 +4,19 @@ $id: http://devicetree.org/schemas/pinctrl/airoha,en7581-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Airoha EN7581 Pin Controller +title: Airoha EN7581/AN7583 Pin Controller maintainers: - Lorenzo Bianconi description: - The Airoha's EN7581 Pin controller is used to control SoC pins. + The Airoha's EN7581/AN7583 Pin controller is used to control SoC pins. properties: compatible: - const: airoha,en7581-pinctrl + enum: + - airoha,en7581-pinctrl + - airoha,an7583-pinctrl interrupts: maxItems: 1 @@ -32,9 +34,6 @@ properties: '#interrupt-cells': const: 2 -allOf: - - $ref: pinctrl.yaml# - required: - compatible - interrupts @@ -151,18 +150,6 @@ patternProperties: items: enum: [spi_quad, spi_cs1] maxItems: 2 - - if: - properties: - function: - const: pcm_spi - then: - properties: - groups: - items: - enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1, - pcm_spi_cs2_p156, pcm_spi_cs2_p128, pcm_spi_cs3, - pcm_spi_cs4] - maxItems: 7 - if: properties: function: @@ -187,14 +174,6 @@ patternProperties: properties: groups: enum: [pnand] - - if: - properties: - function: - const: pcie_reset - then: - properties: - groups: - enum: [pcie_reset0, pcie_reset1, pcie_reset2] - if: properties: function: @@ -209,70 +188,6 @@ patternProperties: gpio26, gpio27, gpio28, gpio29, gpio30, gpio31, gpio36, gpio37, gpio38, gpio39, gpio40, gpio41, gpio42, gpio43, gpio44, gpio45, gpio46, gpio47] - - if: - properties: - function: - const: phy1_led0 - then: - properties: - groups: - enum: [gpio33, gpio34, gpio35, gpio42] - - if: - properties: - function: - const: phy2_led0 - then: - properties: - groups: - enum: [gpio33, gpio34, gpio35, gpio42] - - if: - properties: - function: - const: phy3_led0 - then: - properties: - groups: - enum: [gpio33, gpio34, gpio35, gpio42] - - if: - properties: - function: - const: phy4_led0 - then: - properties: - groups: - enum: [gpio33, gpio34, gpio35, gpio42] - - if: - properties: - function: - const: phy1_led1 - then: - properties: - groups: - enum: [gpio43, gpio44, gpio45, gpio46] - - if: - properties: - function: - const: phy2_led1 - then: - properties: - groups: - enum: [gpio43, gpio44, gpio45, gpio46] - - if: - properties: - function: - const: phy3_led1 - then: - properties: - groups: - enum: [gpio43, gpio44, gpio45, gpio46] - - if: - properties: - function: - const: phy4_led1 - then: - properties: - groups: - enum: [gpio43, gpio44, gpio45, gpio46] additionalProperties: false @@ -331,6 +246,208 @@ patternProperties: additionalProperties: false +allOf: + - $ref: pinctrl.yaml# + + - if: + properties: + compatible: + contains: + const: airoha,en7581-pinctrl + then: + patternProperties: + '-pins$': + type: object + + patternProperties: + '^mux(-|$)': + type: object + + allOf: + - if: + properties: + function: + const: pcm_spi + then: + properties: + groups: + items: + enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1, + pcm_spi_cs2_p156, pcm_spi_cs2_p128, pcm_spi_cs3, + pcm_spi_cs4] + maxItems: 7 + - if: + properties: + function: + const: pcie_reset + then: + properties: + groups: + enum: [pcie_reset0, pcie_reset1, pcie_reset2] + - if: + properties: + function: + const: phy1_led0 + then: + properties: + groups: + enum: [gpio33, gpio34, gpio35, gpio42] + - if: + properties: + function: + const: phy2_led0 + then: + properties: + groups: + enum: [gpio33, gpio34, gpio35, gpio42] + - if: + properties: + function: + const: phy3_led0 + then: + properties: + groups: + enum: [gpio33, gpio34, gpio35, gpio42] + - if: + properties: + function: + const: phy4_led0 + then: + properties: + groups: + enum: [gpio33, gpio34, gpio35, gpio42] + - if: + properties: + function: + const: phy1_led1 + then: + properties: + groups: + enum: [gpio43, gpio44, gpio45, gpio46] + - if: + properties: + function: + const: phy2_led1 + then: + properties: + groups: + enum: [gpio43, gpio44, gpio45, gpio46] + - if: + properties: + function: + const: phy3_led1 + then: + properties: + groups: + enum: [gpio43, gpio44, gpio45, gpio46] + - if: + properties: + function: + const: phy4_led1 + then: + properties: + groups: + enum: [gpio43, gpio44, gpio45, gpio46] + + - if: + properties: + compatible: + contains: + const: airoha,an7583-pinctrl + then: + patternProperties: + '-pins$': + type: object + + patternProperties: + '^mux(-|$)': + type: object + + allOf: + - if: + properties: + function: + const: pcm_spi + then: + properties: + groups: + items: + enum: [pcm_spi, pcm_spi_int, pcm_spi_rst, pcm_spi_cs1, + pcm_spi_cs2, pcm_spi_cs3, pcm_spi_cs4] + maxItems: 7 + - if: + properties: + function: + const: pcie_reset + then: + properties: + groups: + enum: [pcie_reset0, pcie_reset1] + - if: + properties: + function: + const: phy1_led0 + then: + properties: + groups: + enum: [gpio1, gpio2, gpio3, gpio4] + - if: + properties: + function: + const: phy2_led0 + then: + properties: + groups: + enum: [gpio1, gpio2, gpio3, gpio4] + - if: + properties: + function: + const: phy3_led0 + then: + properties: + groups: + enum: [gpio1, gpio2, gpio3, gpio4] + - if: + properties: + function: + const: phy4_led0 + then: + properties: + groups: + enum: [gpio1, gpio2, gpio3, gpio4] + - if: + properties: + function: + const: phy1_led1 + then: + properties: + groups: + enum: [gpio8, gpio9, gpio10, gpio11] + - if: + properties: + function: + const: phy2_led1 + then: + properties: + groups: + enum: [gpio8, gpio9, gpio10, gpio11] + - if: + properties: + function: + const: phy3_led1 + then: + properties: + groups: + enum: [gpio8, gpio9, gpio10, gpio11] + - if: + properties: + function: + const: phy4_led1 + then: + properties: + groups: + enum: [gpio8, gpio9, gpio10, gpio11] + examples: - | #include