From patchwork Fri Jun 6 15:03:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Draszik?= X-Patchwork-Id: 894547 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C286628A716 for ; Fri, 6 Jun 2025 15:03:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749222208; cv=none; b=vCXdqUDlyGCiYDTEzSl6Vg5qMes9mZMQKsmFEa7nwGhjo+HbK1ZvfYPgI16OX11emL56nIw84eYOBqQcM5PvVGxFH2UL9o+60sqhP3DB96mfLZ/0b2UFVdCNd2oI4lP1KEvbVnw5cMJ4dohA8w18rt+XzVXMfmZbhT65dYH9K7A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749222208; c=relaxed/simple; bh=syZqlGzC72/t8vkCP+G/vfPzkzAsoIw8JOd/I56yBTA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gRBzFMtemFpIq7POtn7Sep3nSNaChBc12hk9D0EPwOt4M3qqFkTxxJWB9dhfMGoOHp0aYqj5baq5DhUWaqx0nBl6Y0zjp3bpCllBUipROC1U5fgo3PdsuI94z1v/QqA27z0Z4McvhfBJBAFYNv6ua142FtVY5pMcoToEQc8pp8k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WmguJ+CX; arc=none smtp.client-ip=209.85.208.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WmguJ+CX" Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-6069d764980so6327791a12.0 for ; Fri, 06 Jun 2025 08:03:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1749222203; x=1749827003; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TxuFgIOh2mgMCY+EKEZtpxVIWFIGfgf2zHxoAajskPM=; b=WmguJ+CXGspvSr+oIn/PQ1MUjeEHCGI+ZfgeETj+0o3HtZ79wQ0ePv43jv6ZqSpWJV OEw1Cpp0mTFlwaRmTsgU5e12X1Q0RxwucNZzD1KSXlmRgPu/itakZFVh1LyYmIsnCbMm n2W8J7aEeI/ODoMKH/A6QT8U6DRIYkIsyAllMzFpqIrvVn0nYkWliRF8M0Z9TzE6cmdM p3Y1Q2aFS3lc4d2dpaLn4ia69Fd48Efm1YomiYI8SgRjxR1fX/7nN5x4PkiqsSyEYNwL QIYCznsn+HyerMFYormtoz7JjwPXxd0vvI+jaVn8tCyBjOJm/QIIF3taKxxXn9/0E93K 67sQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1749222203; x=1749827003; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TxuFgIOh2mgMCY+EKEZtpxVIWFIGfgf2zHxoAajskPM=; b=i03Jxv/qd6QsJ8PR61ivJvuksoyJVaKIkrBRKi5vI68+9LB/Re09VsV7GPT1Ww9f0U ng9iWQDd/DhkI5UZYmNjMUUEEisbfUjksieOIeDdIRybxfBD1YsrnsmGsRMnT4yjEQIM vBhgq9CP+53elCqk8FqWA0cNQYDVHGy92kKY9DO+AHRHD7ztmTSdvwI7fyuWXdnPCLkC YbD83OnBIPXnIsPVzhky2RM16FbEogQoqv9QCj3ERSkDPQbvQMVTnQu2D0ybxTc46vTT NqUtLgsCtd9BG8oQioekfRmZGGiC4Z6YptbYp42WDnvsEXXjz4ctwNBQeYOlkMrp6iP+ V/Pw== X-Forwarded-Encrypted: i=1; AJvYcCXBFyyUFOpwSeWfIGEWHihLy4LEux93o2W9Z5FfWgOFor1sycepQKazppdoi2fR8xfXkWNe3WM7Ap0a@vger.kernel.org X-Gm-Message-State: AOJu0YyQA2Yh96H4XK2/9Ax+hDoty3BJWRnPRObCWN5IVov6XQgnL41r DImAuvL5AfYgKikwVoSu8RXDJZ6NoRK5nnuQ+Oto8k9tR1t5/m8ifSrqcbrgcK6NoTg= X-Gm-Gg: ASbGncuEuBfjvyMNtmEIGmJgBizlXUtKF3GyzW4ntMUQym6V9A7q58sQxhimacMnIxB +R1kWKcCwmG4IPjJg3u8aimy3Gn01nn8AhvdH3NLUMXoIVBxVR6wRItDd7K18l5yLOPB9E0x8sK Hy5qgAfoLRNZ/1gdtita3ElBtKxnVgUORHd/DwFzq4TxHvmd4773GvyX0mYmA/R74XIHkhYpwt4 IaCxfQ5XQRfdizhWaiQHvQFbdJxVZZRk5pcc3msqRugfeHLaxWBQq77S5Iu4FfELycei5iTPdSQ mMuH3xQ0jQLpu4a6ZZX3VYjQvM02Cjm1LKput5OCHlmFajnCUGYyyBhPrxrpY1QiCICAeKDUYhC W3xfCvpDCiSl7XNo1xQq6q1sGfKWIYwabLMk= X-Google-Smtp-Source: AGHT+IFQ9GdhBmsl8Wmw5y1twbzw8bstB4oQUdlQnMwH7xyg/21qXcgF4oPPHSFacZvABtKOeaLB5Q== X-Received: by 2002:a17:906:99c2:b0:ad8:8f3b:de2d with SMTP id a640c23a62f3a-ade07606d85mr625857866b.9.1749222200718; Fri, 06 Jun 2025 08:03:20 -0700 (PDT) Received: from puffmais.c.googlers.com (140.20.91.34.bc.googleusercontent.com. [34.91.20.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ade1dc38cf2sm127735066b.121.2025.06.06.08.03.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Jun 2025 08:03:20 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Date: Fri, 06 Jun 2025 16:03:12 +0100 Subject: [PATCH v2 16/17] regulator: s2mps11: add S2MPG11 regulator Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250606-s2mpg1x-regulators-v2-16-b03feffd2621@linaro.org> References: <20250606-s2mpg1x-regulators-v2-0-b03feffd2621@linaro.org> In-Reply-To: <20250606-s2mpg1x-regulators-v2-0-b03feffd2621@linaro.org> To: Tudor Ambarus , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Liam Girdwood , Mark Brown , Lee Jones , Linus Walleij , Bartosz Golaszewski Cc: Peter Griffin , Will McVicker , kernel-team@android.com, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?Andr?= =?utf-8?q?=C3=A9_Draszik?= X-Mailer: b4 0.14.2 The S2MPG11 PMIC is a Power Management IC for mobile applications with buck converters, various LDOs, power meters, and additional GPIO interfaces. It typically complements an S2MPG10 PMIC in a main/sub configuration as the sub-PMIC. It has 12 buck, 1 buck-boost, and 15 LDO rails. Several of these can either be controlled via software or via external signals, e.g. input pins connected to a main processor's GPIO pins. This commit implements support for these rails. The rails are instantiated as separate driver instances for bucks and LDOs, because S2MPG11 is typically used with an S2MPG10 main-PMIC where some bucks of one typically supply at least some of the LDOs of the other. Signed-off-by: André Draszik --- v2: - fix commit message typo - mention GPIOs in commit message --- drivers/regulator/s2mps11.c | 301 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 300 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/s2mps11.c b/drivers/regulator/s2mps11.c index 2829062c54a49a17911cd091cf0ffb7950393787..d46b743d4c6f5e745e101d054581a74e992fbaea 100644 --- a/drivers/regulator/s2mps11.c +++ b/drivers/regulator/s2mps11.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -413,7 +414,7 @@ static int s2mpg10_of_parse_cb(struct device_node *np, struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc); u32 ext_control; - if (s2mps11->dev_type != S2MPG10) + if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11) return 0; if (of_property_read_u32(np, "samsung,ext-control", &ext_control)) @@ -439,6 +440,27 @@ static int s2mpg10_of_parse_cb(struct device_node *np, } break; + case S2MPG11: + switch (desc->id) { + case S2MPG11_BUCK1 ... S2MPG11_BUCK3: + case S2MPG11_BUCK5: + case S2MPG11_BUCK8: + case S2MPG11_BUCK9: + case S2MPG11_BUCKD: + case S2MPG11_BUCKA: + case S2MPG10_LDO1: + case S2MPG10_LDO2: + case S2MPG10_LDO8: + case S2MPG10_LDO13: + if (ext_control > S2MPG11_PCTRLSEL_LDO13S_EN) + return -EINVAL; + break; + + default: + return -EINVAL; + } + break; + default: return -EINVAL; } @@ -476,6 +498,7 @@ static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11, switch (s2mps11->dev_type) { case S2MPG10: + case S2MPG11: s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc); break; @@ -603,6 +626,21 @@ static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev, rdev->desc->ramp_mask); } +static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uV) +{ + unsigned int ramp_mask; + + ramp_mask = rdev->desc->ramp_mask; + if (old_uV > new_uV) + /* The downwards mask is at a different position. */ + ramp_mask >>= 2; + + return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV, + rdev->desc->ramp_reg, + ramp_mask); +} + /* * We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because * only if the latter is != NULL, the regulator core will call neither during @@ -918,6 +956,249 @@ static const struct s2mpg10_regulator_desc s2mpg10_regulators_bucks[] = { PCTRLSEL4, GENMASK(7, 4)) }; +static const struct regulator_ops s2mpg11_reg_buck_ops[] = { + { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable_time = s2mpg10_regulator_buck_enable_time, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + }, { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .set_voltage_time = s2mpg11_regulator_buck_set_voltage_time, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .enable_time = s2mpg10_regulator_buck_enable_time, + .set_ramp_delay = regulator_set_ramp_delay_regmap, + } +}; + +#define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _vrange, \ + _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \ + _pc_reg, _pc_mask) \ + { \ + .desc = regulator_desc_s2mpg1x_ldo_cmn(#_num"s", \ + S2MPG11_LDO##_num, _supply, \ + s2mpg10_reg_ldo_ops, \ + _vrange, \ + S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \ + _vsel_mask, \ + S2MPG11_PMIC_##_en_reg, _en_mask, \ + _ramp_delay, _r_reg, _r_mask, _r_table, \ + _r_table_sz), \ + .pctrlsel_reg = _pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + + +/* standard LDO via LxM_CTRL */ +#define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _vrange, \ + CTRL, GENMASK(5, 0), \ + L##_num##S_CTRL, BIT(7), \ + 0, 0, 0, NULL, 0, \ + 0, 0) + +/* standard LDO but possibly GPIO controlled */ +#define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \ + _pc_reg, _pc_mask) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _vrange, \ + CTRL, GENMASK(5, 0), \ + L##_num##S_CTRL, GENMASK(7, 6), \ + 0, 0, 0, NULL, 0, \ + S2MPG11_PMIC_##_pc_reg, _pc_mask) + +/* LDO with ramp support and possibly GPIO controlled */ +#define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \ + _en_mask, _r_reg_sfx, _pc_reg, _pc_mask) \ + s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _vrange, \ + CTRL1, GENMASK(6, 0), \ + LDO_CTRL1, _en_mask, \ + 6250, S2MPG11_PMIC_##_r_reg_sfx, GENMASK(1, 0), \ + s2mpg10_ldo_ramp_table, \ + ARRAY_SIZE(s2mpg10_ldo_ramp_table), \ + S2MPG11_PMIC_##_pc_reg, _pc_mask) + +#define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4)) + +#define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \ + _vsel_reg, _en_reg, _en_mask, _r_reg) \ + regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \ + s2mpg11_reg_buck_ops, _vrange, \ + S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \ + S2MPG11_PMIC_##_en_reg, _en_mask, \ + S2MPG11_PMIC_##_r_reg, \ + s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \ + s2mpg10_buck_ramp_table, \ + ARRAY_SIZE(s2mpg10_buck_ramp_table), 30) + +#define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg, _en_rrate) \ + .desc = regulator_desc_s2mpg11_buckx(#_num"s", \ + S2MPG11_BUCK##_num, "vinb"#_num"s", \ + _vrange, \ + B##_num##S_##_vsel_reg_sfx, \ + B##_num##S_CTRL, _en_mask, \ + _r_reg), \ + .enable_ramp_rate = _en_rrate + +#define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg) \ + { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ + } + +#define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \ + { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 12500), \ + .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +#define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \ + _en_mask, _r_reg) \ + { \ + s2mpg11_regulator_desc_buck_xm(_num, _vrange, \ + _vsel_reg_sfx, _en_mask, _r_reg, 25000), \ + } + +#define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \ + _pc_reg, _pc_mask) \ + { \ + .desc = regulator_desc_s2mpg11_buckx(#_num_lower, \ + S2MPG11_BUCK##_num, "vinb"#_num_lower, \ + s2mpg11_buck_vranges##_num_lower, \ + BUCK##_num##_OUT, \ + BUCK##_num##_CTRL, GENMASK(7, 6), \ + _r_reg), \ + .enable_ramp_rate = 25000, \ + .pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \ + .pctrlsel_mask = _pc_mask, \ + } + +#define s2mpg11_regulator_desc_buckboost() \ + { \ + .desc = regulator_desc_s2mpg1x_buck_cmn("boost", \ + S2MPG11_BUCKBOOST, "vinbb", \ + s2mpg10_reg_ldo_ops, \ + s2mpg11_buck_vrangesboost, \ + S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \ + S2MPG11_PMIC_BB_CTRL, BIT(7), \ + 0, 0, NULL, 0, 35), \ + .enable_ramp_rate = 17500, \ + } + +/* voltage range for s2mpg11 LDO 1, 2 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV); + +/* voltage range for s2mpg11 LDO 4, 6 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV); + +/* voltage range for s2mpg11 LDO 5 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 8 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800); + +/* voltage range for s2mpg11 LDO 9 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV); + +/* voltage range for s2mpg11 LDO 13 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV); + +/* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 5 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 6 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV); + +/* voltage range for s2mpg11 BUCK 7 */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK D */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK A */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV); + +/* voltage range for s2mpg11 BUCK BOOST */ +S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost, + 2600000, 3000000, 3600000, STEP_12_5_MV); + +static const struct s2mpg10_regulator_desc s2mpg11_regulators_ldos[] = { + s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1, + GENMASK(5, 4), DVS_SYNC_CTRL1, + PCTRLSEL5, GENMASK(3, 0)), + s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1, + GENMASK(7, 6), DVS_SYNC_CTRL2, + PCTRLSEL5, GENMASK(7, 4)), + s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4), + s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5), + s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4), + s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8, + PCTRLSEL6, GENMASK(3, 0)), + s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9), + s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13, + PCTRLSEL6, GENMASK(7, 4)), + s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3), + s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3), +}; + +static const struct s2mpg10_regulator_desc s2mpg11_regulators_bucks[] = { + s2mpg11_regulator_desc_buckboost(), + s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP1, + PCTRLSEL1, GENMASK(3, 0)), + s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP1, + PCTRLSEL1, GENMASK(7, 4)), + s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP2, + PCTRLSEL2, GENMASK(3, 0)), + s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1, + OUT, BIT(7), DVS_RAMP2), + s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5, + OUT, GENMASK(7, 6), DVS_RAMP3, + PCTRLSEL2, GENMASK(7, 4)), + s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6, + OUT1, BIT(7), DVS_RAMP3), + s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7, + OUT1, BIT(7), DVS_RAMP4), + s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP4, + PCTRLSEL3, GENMASK(3, 0)), + s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1, + OUT1, GENMASK(7, 6), DVS_RAMP5, + PCTRLSEL3, GENMASK(7, 4)), + s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1, + OUT, BIT(7), DVS_RAMP5), + s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)), + s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)), +}; + static const struct regulator_ops s2mps11_ldo_ops = { .list_voltage = regulator_list_voltage_linear, .map_voltage = regulator_map_voltage_linear, @@ -1802,6 +2083,7 @@ static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11, break; case S2MPG10: + case S2MPG11: /* * If desc.enable_val is != 0, then external control was * requested. We can not test s2mpg10_desc::ext_control, @@ -1861,6 +2143,22 @@ static int s2mps11_pmic_probe(struct platform_device *pdev) BUILD_BUG_ON((enum s2mpg10_regulators) S2MPS_REGULATOR_MAX < S2MPG10_REGULATOR_MAX); break; + case S2MPG11: + switch (pdev->id + 1) { + case S2MPG10_REGULATOR_CELL_ID_BUCKS: + rdev_num = ARRAY_SIZE(s2mpg11_regulators_bucks); + s2mpg10_regulators = s2mpg11_regulators_bucks; + break; + case S2MPG10_REGULATOR_CELL_ID_LDOS: + rdev_num = ARRAY_SIZE(s2mpg11_regulators_ldos); + s2mpg10_regulators = s2mpg11_regulators_ldos; + break; + default: + return -EINVAL; + } + BUILD_BUG_ON((enum s2mpg11_regulators) S2MPS_REGULATOR_MAX < + S2MPG11_REGULATOR_MAX); + break; case S2MPS11X: rdev_num = ARRAY_SIZE(s2mps11_regulators); regulators = s2mps11_regulators; @@ -1939,6 +2237,7 @@ static int s2mps11_pmic_probe(struct platform_device *pdev) static const struct platform_device_id s2mps11_pmic_id[] = { { "s2mpg10-regulator", S2MPG10}, + { "s2mpg11-regulator", S2MPG11}, { "s2mps11-regulator", S2MPS11X}, { "s2mps13-regulator", S2MPS13X}, { "s2mps14-regulator", S2MPS14X},