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Fri, 11 Apr 2025 11:56:36 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 11 Apr 2025 11:56:35 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 11 Apr 2025 11:56:35 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Fri, 11 Apr 2025 11:56:35 -0400 Received: from JSANTO12-L01.ad.analog.com ([10.65.60.206]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 53BFuHxr015439; Fri, 11 Apr 2025 11:56:20 -0400 From: Jonathan Santos To: , , , CC: Jonathan Santos , , , , , , , , , , , , , , Subject: [PATCH v5 02/14] dt-bindings: iio: adc: ad7768-1: add trigger-sources property Date: Fri, 11 Apr 2025 12:56:17 -0300 Message-ID: <35481552e9ce39a24a0257ab001c0bcfea1a23be.1744325346.git.Jonathan.Santos@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: klpx19_THYd733Yu5ga_N-ZpgLZ2kgdH X-Proofpoint-ORIG-GUID: klpx19_THYd733Yu5ga_N-ZpgLZ2kgdH X-Authority-Analysis: v=2.4 cv=KePSsRYD c=1 sm=1 tr=0 ts=67f93bb5 cx=c_pps a=PpDZqlmH/M8setHirZLBMw==:117 a=PpDZqlmH/M8setHirZLBMw==:17 a=XR8D0OoHHMoA:10 a=gAnH3GRIAAAA:8 a=rALQYAMM0ZtNIrbvjz8A:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-11_06,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 impostorscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 phishscore=0 mlxscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504110101 In addition to GPIO synchronization, The AD7768-1 also supports synchronization over SPI, which use is recommended when the GPIO cannot provide a pulse synchronous with the base MCLK signal. It consists of looping back the SYNC_OUT to the SYNC_IN pin and send a command via SPI to trigger the synchronization. Introduce the 'trigger-sources' property to support SPI-based synchronization, along with additional optional entries for the SPI offload trigger and the START signal via GPIO3. While at it, add description to the interrupts property. Signed-off-by: Jonathan Santos --- v5 Changes: * Include START pin and DRDY in the trigger-sources description. * Fixed "#trigger-source-cells" value and description. * sync-in-gpios is represented in the trigger-sources property. v4 Changes: * none v3 Changes: * Fixed dt-bindings errors. * Trigger-source is set as an alternative to sync-in-gpios, so we don't break the previous ABI. * increased maxItems from trigger-sources to 2. v2 Changes: * Patch added as replacement for adi,sync-in-spi patch. * addressed the request for a description to interrupts property. --- .../bindings/iio/adc/adi,ad7768-1.yaml | 38 +++++++++++++++++-- 1 file changed, 35 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml index 3ce59d4d065f..4c58dbe8f749 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml @@ -26,7 +26,30 @@ properties: clock-names: const: mclk + trigger-sources: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + maxItems: 3 + description: | + A list of phandles referencing trigger source devices or GPIOs. + Supports up to three entries, each representing a different type of + trigger: + + - First entry specifies the device responsible for driving the + synchronization (SYNC_IN) pin, as an alternative to adi,sync-in-gpios. + This can be a `gpio-trigger` or another `ad7768-1` device. If the + device's own SYNC_OUT pin is internally connected to its SYNC_IN pin, + reference the device itself or omit this property. + - Second entry optionally defines a GPIO3 pin used as a START signal trigger. + - Third entry specifies a GPIO line to act as a trigger for SPI offload. + + Use the accompanying trigger source cell to identify the type of each entry. + interrupts: + description: + Specifies the interrupt line associated with the ADC. This refers + to the DRDY (Data Ready) pin, which signals when conversion results are + available. maxItems: 1 '#address-cells': @@ -57,6 +80,15 @@ properties: "#io-channel-cells": const: 1 + "#trigger-source-cells": + description: | + Indicates the trigger source type for each entry: + 0 = Synchronization GPIO-based trigger + 1 = Synchronization device trigger (e.g., another ad7768-1) + 2 = GPIO3 pin acting as START signal + 3 = DRDY pin acting as SPI offload trigger + const: 1 + required: - compatible - reg @@ -65,7 +97,6 @@ required: - vref-supply - spi-cpol - spi-cpha - - adi,sync-in-gpios patternProperties: "^channel@([0-9]|1[0-5])$": @@ -99,7 +130,7 @@ examples: #address-cells = <1>; #size-cells = <0>; - adc@0 { + adc0: adc@0 { compatible = "adi,ad7768-1"; reg = <0>; spi-max-frequency = <2000000>; @@ -108,7 +139,8 @@ examples: vref-supply = <&adc_vref>; interrupts = <25 IRQ_TYPE_EDGE_RISING>; interrupt-parent = <&gpio>; - adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + trigger-sources = <&adc0 1>; + #trigger-source-cells = <1>; reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; clocks = <&ad7768_mclk>; clock-names = "mclk";