Message ID | 87edz5ty0r.wl-kuninori.morimoto.gx@renesas.com |
---|---|
State | Accepted |
Commit | 665f77eb0d2f272b191bf442aef033cbce4647f9 |
Headers | show
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Fri, 1 Jul 2022 01:36:04 +0000 Message-ID: <87edz5ty0r.wl-kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Subject: [PATCH v4 02/23] pinctrl: renesas: Add PORT_GP_CFG_13 macros User-Agent: Wanderlust/2.15.9 Emacs/26.3 Mule/6.0 To: Geert Uytterhoeven <geert+renesas@glider.be>, Geert Uytterhoeven <geert.uytterhoeven@gmail.com>, Geert Uytterhoeven <geert@linux-m68k.org> Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>, Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org In-Reply-To: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com> References: <87h741ty20.wl-kuninori.morimoto.gx@renesas.com> Content-Type: text/plain; charset=US-ASCII Date: Fri, 1 Jul 2022 01:36:04 +0000 X-ClientProxiedBy: TYCP286CA0117.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:29c::15) To OS3PR01MB8426.jpnprd01.prod.outlook.com (2603:1096:604:194::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 4908b9b2-29c6-47a8-ff4d-08da5b021023 X-MS-TrafficTypeDiagnostic: TYCPR01MB7362:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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pinctrl: renesas: r8a779g0: Add pins, groups and functions
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diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 12bc279f5733..bd0ae9d7005a 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -492,9 +492,13 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) -#define PORT_GP_CFG_14(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_13(bank, fn, sfx, cfg) \ PORT_GP_CFG_12(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 12, fn, sfx, cfg) +#define PORT_GP_13(bank, fn, sfx) PORT_GP_CFG_13(bank, fn, sfx, 0) + +#define PORT_GP_CFG_14(bank, fn, sfx, cfg) \ + PORT_GP_CFG_13(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 13, fn, sfx, cfg) #define PORT_GP_14(bank, fn, sfx) PORT_GP_CFG_14(bank, fn, sfx, 0)