Message ID | 87leue49sv.wl-kuninori.morimoto.gx@renesas.com |
---|---|
State | New |
Headers | show |
Series | pinctrl: renesas: r8a779g0: Add pins, groups and functions | expand |
Hi Morimoto-san, On Fri, Jun 3, 2022 at 7:04 AM Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote: > From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> > > Add PORT_GP_CFG_13() and PORT_GP_13() helper macros, > to be used by the r8a779g0 subdriver. > > Based on a larger patch in the BSP by LUU HOAI. > > Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Thanks for your patch! > --- a/drivers/pinctrl/renesas/sh_pfc.h > +++ b/drivers/pinctrl/renesas/sh_pfc.h > @@ -492,6 +492,11 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; > PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) > #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) > > +#define PORT_GP_CFG_13(bank, fn, sfx, cfg) \ > + PORT_GP_CFG_12(bank, fn, sfx, cfg), \ > + PORT_GP_CFG_1(bank, 12, fn, sfx, cfg) > +#define PORT_GP_13(bank, fn, sfx) PORT_GP_CFG_13(bank, fn, sfx, 0) LGTM. > + > #define PORT_GP_CFG_14(bank, fn, sfx, cfg) \ > PORT_GP_CFG_12(bank, fn, sfx, cfg), \ Please update PORT_GP_CFG_14() to use the new PORT_GP_CFG_13() macro. > PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), \ Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 6b5836ea47de..e53e02c95167 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -492,6 +492,11 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) +#define PORT_GP_CFG_13(bank, fn, sfx, cfg) \ + PORT_GP_CFG_12(bank, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 12, fn, sfx, cfg) +#define PORT_GP_13(bank, fn, sfx) PORT_GP_CFG_13(bank, fn, sfx, 0) + #define PORT_GP_CFG_14(bank, fn, sfx, cfg) \ PORT_GP_CFG_12(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), \