diff mbox series

[v3,07/21] pinctrl: renesas: r8a779g0: remove not used MOD_SELx definitions

Message ID 87tu8nkcp7.wl-kuninori.morimoto.gx@renesas.com
State New
Headers show
Series None | expand

Commit Message

Kuninori Morimoto June 14, 2022, 5:59 a.m. UTC 
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Current V4H PFC code has many MOD_SELx definitions with all 0.
But these have no meaning. This patch removes these, but keep
its definition to avoid unreadable PINMUX_MOD_SELS.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 drivers/pinctrl/renesas/pfc-r8a779g0.c | 72 +++++++++++++-------------
 1 file changed, 36 insertions(+), 36 deletions(-)

Comments

Geert Uytterhoeven June 17, 2022, 3:17 p.m. UTC | #1 
Hi Morimoto-san,

Thanks for your patch!

On Tue, Jun 14, 2022 at 7:59 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> Current V4H PFC code has many MOD_SELx definitions with all 0.
> But these have no meaning. This patch removes these, but keep
> its definition to avoid unreadable PINMUX_MOD_SELS.

You can just replace them with blanks, keeping the structure of the
PINMUX_MOD_SELS table alive.

>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Again, as the only net impact of this patch is the removal of several
enums, and a shift in the numbering of later (internal) enums, I think
it is safe to fold this into "[PATCH v3 03/21] pinctrl: renesas:
Initial R8A779G0 (V4H) PFC support".

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Kuninori Morimoto June 21, 2022, 12:12 a.m. UTC | #2 
Hi Geert

> > Current V4H PFC code has many MOD_SELx definitions with all 0.
> > But these have no meaning. This patch removes these, but keep
> > its definition to avoid unreadable PINMUX_MOD_SELS.
> 
> You can just replace them with blanks, keeping the structure of the
> PINMUX_MOD_SELS table alive.

Sorry, but I don't understand this. Maybe "blanks" and "alive".

Do you mean
1) "remove unnecessary MOD_SELx, and update PINMUX_MOD_SELS table"
   (= need update on v4)

or

2) "use NULL #define, and keep PINMUX_MOD_SELS" (= no update on v4)


Thank you for your help !!

Best regards
---
Kuninori Morimoto
Geert Uytterhoeven June 21, 2022, 6:36 a.m. UTC | #3 
Hi Morimoto-san,

On Tue, Jun 21, 2022 at 2:12 AM Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> > > Current V4H PFC code has many MOD_SELx definitions with all 0.
> > > But these have no meaning. This patch removes these, but keep
> > > its definition to avoid unreadable PINMUX_MOD_SELS.
> >
> > You can just replace them with blanks, keeping the structure of the
> > PINMUX_MOD_SELS table alive.
>
> Sorry, but I don't understand this. Maybe "blanks" and "alive".

blanks = TABs, i.e. a hole in the table structure
perhaps s/alive/intact/?

> Do you mean
> 1) "remove unnecessary MOD_SELx, and update PINMUX_MOD_SELS table"
>    (= need update on v4)
>
> or
>
> 2) "use NULL #define, and keep PINMUX_MOD_SELS" (= no update on v4)

I meant 1).

E.g.

-#define MOD_SEL7_1

and

-MOD_SEL4_1             MOD_SEL5_1              MOD_SEL6_1
 MOD_SEL7_1              MOD_SEL8_1      \
+MOD_SEL4_1             MOD_SEL5_1              MOD_SEL6_1
                         MOD_SEL8_1      \

Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index d049bb71dfe8..76d2cdddebe2 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -566,85 +566,85 @@  FM(IP0SR8_31_28)	IP0SR8_31_28
 /* MOD_SEL4 */			/* 0 */				/* 1 */
 #define MOD_SEL4_19		FM(SEL_TSN0_TD2_0)		FM(SEL_TSN0_TD2_1)
 #define MOD_SEL4_18		FM(SEL_TSN0_TD3_0)		FM(SEL_TSN0_TD3_1)
-#define MOD_SEL4_17		F_(0, 0)			F_(0, 0)
-#define MOD_SEL4_16		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_17
+#define MOD_SEL4_16
 #define MOD_SEL4_15		FM(SEL_TSN0_TD0_0)		FM(SEL_TSN0_TD0_1)
 #define MOD_SEL4_14		FM(SEL_TSN0_TD1_0)		FM(SEL_TSN0_TD1_1)
-#define MOD_SEL4_13		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_13
 #define MOD_SEL4_12		FM(SEL_TSN0_TXC_0)		FM(SEL_TSN0_TXC_1)
-#define MOD_SEL4_11		F_(0, 0)			F_(0, 0)
-#define MOD_SEL4_10		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_11
+#define MOD_SEL4_10
 #define MOD_SEL4_9		FM(SEL_TSN0_TX_CTL_0)		FM(SEL_TSN0_TX_CTL_1)
 #define MOD_SEL4_8		FM(SEL_TSN0_AVTP_PPS0_0)	FM(SEL_TSN0_AVTP_PPS0_1)
-#define MOD_SEL4_7		F_(0, 0)			F_(0, 0)
-#define MOD_SEL4_6		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_7
+#define MOD_SEL4_6
 #define MOD_SEL4_5		FM(SEL_TSN0_AVTP_MATCH_0)	FM(SEL_TSN0_AVTP_MATCH_1)
-#define MOD_SEL4_4		F_(0, 0)			F_(0, 0)
-#define MOD_SEL4_3		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_4
+#define MOD_SEL4_3
 #define MOD_SEL4_2		FM(SEL_TSN0_AVTP_PPS1_0)	FM(SEL_TSN0_AVTP_PPS1_1)
 #define MOD_SEL4_1		FM(SEL_TSN0_MDC_0)		FM(SEL_TSN0_MDC_1)
-#define MOD_SEL4_0		F_(0, 0)			F_(0, 0)
+#define MOD_SEL4_0
 
 /* MOD_SEL5 */			/* 0 */				/* 1 */
 #define MOD_SEL5_19		FM(SEL_AVB2_TX_CTL_0)		FM(SEL_AVB2_TX_CTL_1)
-#define MOD_SEL5_18		F_(0, 0)			F_(0, 0)
-#define MOD_SEL5_17		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_18
+#define MOD_SEL5_17
 #define MOD_SEL5_16		FM(SEL_AVB2_TXC_0)		FM(SEL_AVB2_TXC_1)
 #define MOD_SEL5_15		FM(SEL_AVB2_TD0_0)		FM(SEL_AVB2_TD0_1)
-#define MOD_SEL5_14		F_(0, 0)			F_(0, 0)
-#define MOD_SEL5_13		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_14
+#define MOD_SEL5_13
 #define MOD_SEL5_12		FM(SEL_AVB2_TD1_0)		FM(SEL_AVB2_TD1_1)
 #define MOD_SEL5_11		FM(SEL_AVB2_TD2_0)		FM(SEL_AVB2_TD2_1)
-#define MOD_SEL5_10		F_(0, 0)			F_(0, 0)
-#define MOD_SEL5_9		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_10
+#define MOD_SEL5_9
 #define MOD_SEL5_8		FM(SEL_AVB2_TD3_0)		FM(SEL_AVB2_TD3_1)
-#define MOD_SEL5_7		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_7
 #define MOD_SEL5_6		FM(SEL_AVB2_MDC_0)		FM(SEL_AVB2_MDC_1)
 #define MOD_SEL5_5		FM(SEL_AVB2_MAGIC_0)		FM(SEL_AVB2_MAGIC_1)
-#define MOD_SEL5_4		F_(0, 0)			F_(0, 0)
-#define MOD_SEL5_3		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_4
+#define MOD_SEL5_3
 #define MOD_SEL5_2		FM(SEL_AVB2_AVTP_MATCH_0)	FM(SEL_AVB2_AVTP_MATCH_1)
-#define MOD_SEL5_1		F_(0, 0)			F_(0, 0)
+#define MOD_SEL5_1
 #define MOD_SEL5_0		FM(SEL_AVB2_AVTP_PPS_0)		FM(SEL_AVB2_AVTP_PPS_1)
 
 /* MOD_SEL6 */			/* 0 */				/* 1 */
 #define MOD_SEL6_18		FM(SEL_AVB1_TD3_0)		FM(SEL_AVB1_TD3_1)
-#define MOD_SEL6_17		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_17
 #define MOD_SEL6_16		FM(SEL_AVB1_TD2_0)		FM(SEL_AVB1_TD2_1)
-#define MOD_SEL6_15		F_(0, 0)			F_(0, 0)
-#define MOD_SEL6_14		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_15
+#define MOD_SEL6_14
 #define MOD_SEL6_13		FM(SEL_AVB1_TD0_0)		FM(SEL_AVB1_TD0_1)
 #define MOD_SEL6_12		FM(SEL_AVB1_TD1_0)		FM(SEL_AVB1_TD1_1)
-#define MOD_SEL6_11		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_11
 #define MOD_SEL6_10		FM(SEL_AVB1_AVTP_PPS_0)		FM(SEL_AVB1_AVTP_PPS_1)
-#define MOD_SEL6_9		F_(0, 0)			F_(0, 0)
-#define MOD_SEL6_8		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_9
+#define MOD_SEL6_8
 #define MOD_SEL6_7		FM(SEL_AVB1_TX_CTL_0)		FM(SEL_AVB1_TX_CTL_1)
 #define MOD_SEL6_6		FM(SEL_AVB1_TXC_0)		FM(SEL_AVB1_TXC_1)
 #define MOD_SEL6_5		FM(SEL_AVB1_AVTP_MATCH_0)	FM(SEL_AVB1_AVTP_MATCH_1)
-#define MOD_SEL6_4		F_(0, 0)			F_(0, 0)
-#define MOD_SEL6_3		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_4
+#define MOD_SEL6_3
 #define MOD_SEL6_2		FM(SEL_AVB1_MDC_0)		FM(SEL_AVB1_MDC_1)
 #define MOD_SEL6_1		FM(SEL_AVB1_MAGIC_0)		FM(SEL_AVB1_MAGIC_1)
-#define MOD_SEL6_0		F_(0, 0)			F_(0, 0)
+#define MOD_SEL6_0
 
 /* MOD_SEL7 */			/* 0 */				/* 1 */
 #define MOD_SEL7_16		FM(SEL_AVB0_TX_CTL_0)		FM(SEL_AVB0_TX_CTL_1)
 #define MOD_SEL7_15		FM(SEL_AVB0_TXC_0)		FM(SEL_AVB0_TXC_1)
-#define MOD_SEL7_14		F_(0, 0)			F_(0, 0)
+#define MOD_SEL7_14
 #define MOD_SEL7_13		FM(SEL_AVB0_MDC_0)		FM(SEL_AVB0_MDC_1)
-#define MOD_SEL7_12		F_(0, 0)			F_(0, 0)
+#define MOD_SEL7_12
 #define MOD_SEL7_11		FM(SEL_AVB0_TD0_0)		FM(SEL_AVB0_TD0_1)
 #define MOD_SEL7_10		FM(SEL_AVB0_MAGIC_0)		FM(SEL_AVB0_MAGIC_1)
-#define MOD_SEL7_9		F_(0, 0)			F_(0, 0)
-#define MOD_SEL7_8		F_(0, 0)			F_(0, 0)
+#define MOD_SEL7_9
+#define MOD_SEL7_8
 #define MOD_SEL7_7		FM(SEL_AVB0_TD1_0)		FM(SEL_AVB0_TD1_1)
 #define MOD_SEL7_6		FM(SEL_AVB0_TD2_0)		FM(SEL_AVB0_TD2_1)
-#define MOD_SEL7_5		F_(0, 0)			F_(0, 0)
-#define MOD_SEL7_4		F_(0, 0)			F_(0, 0)
+#define MOD_SEL7_5
+#define MOD_SEL7_4
 #define MOD_SEL7_3		FM(SEL_AVB0_TD3_0)		FM(SEL_AVB0_TD3_1)
 #define MOD_SEL7_2		FM(SEL_AVB0_AVTP_MATCH_0)	FM(SEL_AVB0_AVTP_MATCH_1)
-#define MOD_SEL7_1		F_(0, 0)			F_(0, 0)
+#define MOD_SEL7_1
 #define MOD_SEL7_0		FM(SEL_AVB0_AVTP_PPS_0)		FM(SEL_AVB0_AVTP_PPS_1)
 
 /* MOD_SEL8 */			/* 0 */				/* 1 */