From patchwork Thu Dec 23 14:28:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 527564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19F56C433F5 for ; Thu, 23 Dec 2021 14:28:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243807AbhLWO2Z (ORCPT ); Thu, 23 Dec 2021 09:28:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348807AbhLWO2Z (ORCPT ); Thu, 23 Dec 2021 09:28:25 -0500 Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [IPv6:2a02:1800:120:4::f00:13]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFDB1C061756 for ; Thu, 23 Dec 2021 06:28:24 -0800 (PST) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:a9f6:6306:a80a:fe6a]) by baptiste.telenet-ops.be with bizsmtp id ZqUN260041rdBcm01qUNvg; Thu, 23 Dec 2021 15:28:23 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1n0P4v-006a2E-Se; Thu, 23 Dec 2021 15:28:21 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1n0P4v-003rL6-1v; Thu, 23 Dec 2021 15:28:21 +0100 From: Geert Uytterhoeven To: Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] pinctrl: renesas: r8a7794: Add range checking to .pin_to_pocctrl() Date: Thu, 23 Dec 2021 15:28:20 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The .pin_to_pocctrl() implementation for R-Car E2 does not perform a full range check, unlike on all other SoCs. Add the range check, so the checker can validate better the consistency of the pin control tables. Signed-off-by: Geert Uytterhoeven --- To be queued in renesas-pinctrl for v5.18. drivers/pinctrl/renesas/pfc-r8a7794.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c index fbb5b3b68f349ac6..08a4269565e2e54a 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7794.c +++ b/drivers/pinctrl/renesas/pfc-r8a7794.c @@ -5623,6 +5623,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { static int r8a7794_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) { + if (pin < RCAR_GP_PIN(6, 0) || pin > RCAR_GP_PIN(6, 23)) + return -EINVAL; + *pocctrl = 0xe606006c; switch (pin & 0x1f) {