From patchwork Fri May 13 10:31:13 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 1482 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:52:19 -0000 Delivered-To: patches@linaro.org Received: by 10.224.61.3 with SMTP id r3cs3485qah; Fri, 13 May 2011 03:31:16 -0700 (PDT) Received: by 10.204.80.223 with SMTP id u31mr1192962bkk.121.1305282676031; Fri, 13 May 2011 03:31:16 -0700 (PDT) Received: from mail.df.lth.se (mail.df.lth.se [194.47.250.12]) by mx.google.com with ESMTPS id e2si7159686bka.61.2011.05.13.03.31.15 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 13 May 2011 03:31:16 -0700 (PDT) Received-SPF: pass (google.com: domain of triad@df.lth.se designates 194.47.250.12 as permitted sender) client-ip=194.47.250.12; Authentication-Results: mx.google.com; spf=pass (google.com: domain of triad@df.lth.se designates 194.47.250.12 as permitted sender) smtp.mail=triad@df.lth.se Received: from mer.df.lth.se (mer.df.lth.se [194.47.250.37]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.df.lth.se (Postfix) with ESMTPS id 20D0E65DA3; Fri, 13 May 2011 12:31:15 +0200 (CEST) Received: from mer.df.lth.se (triad@localhost.localdomain [127.0.0.1]) by mer.df.lth.se (8.14.3/8.14.3/Debian-9.4) with ESMTP id p4DAVEur020990; Fri, 13 May 2011 12:31:14 +0200 Received: (from triad@localhost) by mer.df.lth.se (8.14.3/8.14.3/Submit) id p4DAVEZV020989; Fri, 13 May 2011 12:31:14 +0200 From: Linus Walleij To: Ben Dooks , linux-i2c@vger.kernel.org Cc: Lee Jones , Linus Walleij Subject: [PATCH 14/14] mach-ux500: set proper I2C platform data from MOP500s Date: Fri, 13 May 2011 12:31:13 +0200 Message-Id: <1305282673-20963-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.7.2.5 This specifies the new per-platform timeout per I2C bus and switches the I2C buses to fast mode, and increase the FIFO depth to 8 for reads and writes. Signed-off-by: Linus Walleij --- arch/arm/mach-ux500/board-mop500.c | 14 ++++++++------ 1 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 6e1907fa..bb26f40 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c @@ -204,7 +204,7 @@ static struct i2c_board_info __initdata mop500_i2c2_devices[] = { }, }; -#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, _sm) \ +#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \ static struct nmk_i2c_controller u8500_i2c##id##_data = { \ /* \ * slave data setup time, which is \ @@ -219,19 +219,21 @@ static struct nmk_i2c_controller u8500_i2c##id##_data = { \ .rft = _rft, \ /* std. mode operation */ \ .clk_freq = clk, \ + /* Slave response timeout(ms) */\ + .timeout = t_out, \ .sm = _sm, \ } /* * The board uses 4 i2c controllers, initialize all of * them with slave data setup time of 250 ns, - * Tx & Rx FIFO threshold values as 1 and standard + * Tx & Rx FIFO threshold values as 8 and standard * mode of operation */ -U8500_I2C_CONTROLLER(0, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); -U8500_I2C_CONTROLLER(1, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); -U8500_I2C_CONTROLLER(2, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); -U8500_I2C_CONTROLLER(3, 0xe, 1, 1, 100000, I2C_FREQ_MODE_STANDARD); +U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); +U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); +U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); +U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST); static void __init mop500_i2c_init(void) {