| Message ID | 20241001-arm64-gcs-v13-0-222b78d87eee@kernel.org |
|---|---|
| Headers | show |
| Series | arm64/gcs: Provide support for GCS in userspace | expand |
On Tue, 01 Oct 2024 23:58:55 +0100, Mark Brown <broonie@kernel.org> wrote: > @@ -4714,6 +4735,10 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu) > kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 | > HFGxTR_EL2_nPOR_EL0); > > + if (!kvm_has_gcs(kvm)) > + kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nGCS_EL0 | > + HFGxTR_EL2_nGCS_EL1); > + Why are you still allowing the GCS instructions when GCS isn't enabled? M.
On Wed, 02 Oct 2024 01:24:25 +0100, Marc Zyngier <maz@kernel.org> wrote: > > On Tue, 01 Oct 2024 23:58:55 +0100, > Mark Brown <broonie@kernel.org> wrote: > > > @@ -4714,6 +4735,10 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu) > > kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 | > > HFGxTR_EL2_nPOR_EL0); > > > > + if (!kvm_has_gcs(kvm)) > > + kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nGCS_EL0 | > > + HFGxTR_EL2_nGCS_EL1); > > + > > Why are you still allowing the GCS instructions when GCS isn't > enabled? Scratch that, they are NOPs when GCS isn't enabled, so there shouldn't be any need for extra traps. M.
On Wed, Oct 02, 2024 at 04:55:25PM +0100, Marc Zyngier wrote: > Marc Zyngier <maz@kernel.org> wrote: > > > + if (!kvm_has_gcs(kvm)) > > > + kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nGCS_EL0 | > > > + HFGxTR_EL2_nGCS_EL1); > > Why are you still allowing the GCS instructions when GCS isn't > > enabled? > Scratch that, they are NOPs when GCS isn't enabled, so there shouldn't > be any need for extra traps. They are, though really they should UNDEF if GCS isn't there (which I had thought was what you were referencing here). Equally we only have traps for a subset of GCS instructions and it's not like there aren't a whole bunch of untrappable extensions anyway so it's not clear it's worth the effort just for that.
On Wed, 02 Oct 2024 19:24:12 +0100, Mark Brown <broonie@kernel.org> wrote: > > [1 <text/plain; us-ascii (7bit)>] > On Wed, Oct 02, 2024 at 04:55:25PM +0100, Marc Zyngier wrote: > > Marc Zyngier <maz@kernel.org> wrote: > > > > > + if (!kvm_has_gcs(kvm)) > > > > + kvm->arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nGCS_EL0 | > > > > + HFGxTR_EL2_nGCS_EL1); > > > > Why are you still allowing the GCS instructions when GCS isn't > > > enabled? > > > Scratch that, they are NOPs when GCS isn't enabled, so there shouldn't > > be any need for extra traps. > > They are, though really they should UNDEF if GCS isn't there (which I > had thought was what you were referencing here). Equally we only have > traps for a subset of GCS instructions and it's not like there aren't a > whole bunch of untrappable extensions anyway so it's not clear it's > worth the effort just for that. If the encodings UNDEF when GCS is not implemented (i.e. they are not in the NOP space), then all trapable instructions should absolutely UNDEF (and yes, it is worth the effort, even if it is only to demonstrate that the architecture is sub-par). So I expect the next version to handle traps for GCSPUSHX, GCSPOPX, GCSPUSHM, GCSSTR and GCSSTTR when GCS isn't enabled. I'm also pretty sure this is missing some form of sanitisation for PSTATE.EXLOCK, and looking at the pseudocode, you seem to be missing the handling of that bit on exception injection. M.
On Wed, Oct 02, 2024 at 08:29:28PM +0100, Marc Zyngier wrote: > Mark Brown <broonie@kernel.org> wrote: > > They are, though really they should UNDEF if GCS isn't there (which I > > had thought was what you were referencing here). Equally we only have > > traps for a subset of GCS instructions and it's not like there aren't a > > whole bunch of untrappable extensions anyway so it's not clear it's > > worth the effort just for that. > If the encodings UNDEF when GCS is not implemented (i.e. they are not > in the NOP space), then all trapable instructions should absolutely > UNDEF (and yes, it is worth the effort, even if it is only to > demonstrate that the architecture is sub-par). Yes, see DDI0487 K.a C5.9. If you're concerned about being unable to generate UNDEFs there's a rather large set of existing extensions where that's not possible, most of the hwcaps in the hwcap selftest that don't set sigill_reliable but do have a SIGILL generator for a start. > So I expect the next version to handle traps for GCSPUSHX, GCSPOPX, > GCSPUSHM, GCSSTR and GCSSTTR when GCS isn't enabled. OK, I already had that change locally after your first message. > I'm also pretty sure this is missing some form of sanitisation for > PSTATE.EXLOCK, and looking at the pseudocode, you seem to be missing > the handling of that bit on exception injection. Ah, yes - I think I see the missing exception injection handling in enter_exception64(). I'm not seeing what you're referencing with sanitisation though, could you give me some more specific pointers please?
On Tue, 01 Oct 2024 23:58:39 +0100, Mark Brown wrote: > The arm64 Guarded Control Stack (GCS) feature provides support for > hardware protected stacks of return addresses, intended to provide > hardening against return oriented programming (ROP) attacks and to make > it easier to gather call stacks for applications such as profiling. > > When GCS is active a secondary stack called the Guarded Control Stack is > maintained, protected with a memory attribute which means that it can > only be written with specific GCS operations. The current GCS pointer > can not be directly written to by userspace. When a BL is executed the > value stored in LR is also pushed onto the GCS, and when a RET is > executed the top of the GCS is popped and compared to LR with a fault > being raised if the values do not match. GCS operations may only be > performed on GCS pages, a data abort is generated if they are not. > > [...] I applied most of the series to arm64 (for-next/gcs), apart from two KVM patches - 16 and 40 (the latter is the kselftest). I usually start picking patches at -rc3 but the glibc folk are waiting for these patches to at least end up in a maintainer's branch. Of course, these patches are subject to change until the final 6.13 release. The KVM patches can go on top once agreed (or they can go in via the KVM tree, I don't mind either way). Thanks! [01/40] mm: Introduce ARCH_HAS_USER_SHADOW_STACK https://git.kernel.org/arm64/c/bcc9d04e749a [02/40] mm: Define VM_HIGH_ARCH_6 https://git.kernel.org/arm64/c/9ab515b18f84 [03/40] arm64/mm: Restructure arch_validate_flags() for extensibility https://git.kernel.org/arm64/c/f645e888b1a6 [04/40] prctl: arch-agnostic prctl for shadow stack https://git.kernel.org/arm64/c/91e102e79740 [05/40] mman: Add map_shadow_stack() flags https://git.kernel.org/arm64/c/3630e82ab6bd [06/40] arm64: Document boot requirements for Guarded Control Stacks https://git.kernel.org/arm64/c/830ae8a39685 [07/40] arm64/gcs: Document the ABI for Guarded Control Stacks https://git.kernel.org/arm64/c/7058bf87cd59 [08/40] arm64/sysreg: Add definitions for architected GCS caps https://git.kernel.org/arm64/c/ce0641d48ddd [09/40] arm64/gcs: Add manual encodings of GCS instructions https://git.kernel.org/arm64/c/dad947cc22cf [10/40] arm64/gcs: Provide put_user_gcs() https://git.kernel.org/arm64/c/d0aa2b435186 [11/40] arm64/gcs: Provide basic EL2 setup to allow GCS usage at EL0 and EL1 https://git.kernel.org/arm64/c/ff5181d8a2a8 [12/40] arm64/cpufeature: Runtime detection of Guarded Control Stack (GCS) https://git.kernel.org/arm64/c/6487c963083c [13/40] arm64/mm: Allocate PIE slots for EL0 guarded control stack https://git.kernel.org/arm64/c/092055f1508c [14/40] mm: Define VM_SHADOW_STACK for arm64 when we support GCS https://git.kernel.org/arm64/c/ae80e1629aea [15/40] arm64/mm: Map pages for guarded control stack https://git.kernel.org/arm64/c/6497b66ba694 [17/40] arm64/idreg: Add overrride for GCS https://git.kernel.org/arm64/c/a94452112ce4 [18/40] arm64/hwcap: Add hwcap for GCS https://git.kernel.org/arm64/c/eefc98711f84 [19/40] arm64/traps: Handle GCS exceptions https://git.kernel.org/arm64/c/8ce71d270536 [20/40] arm64/mm: Handle GCS data aborts https://git.kernel.org/arm64/c/cfad706e8f6d [21/40] arm64/gcs: Context switch GCS state for EL0 https://git.kernel.org/arm64/c/fc84bc5378a8 [22/40] arm64/gcs: Ensure that new threads have a GCS https://git.kernel.org/arm64/c/506496bcbb42 [23/40] arm64/gcs: Implement shadow stack prctl() interface https://git.kernel.org/arm64/c/b57180c75c7e [24/40] arm64/mm: Implement map_shadow_stack() https://git.kernel.org/arm64/c/8f3e750673b2 [25/40] arm64/signal: Set up and restore the GCS context for signal handlers https://git.kernel.org/arm64/c/eaf62ce1563b [26/40] arm64/signal: Expose GCS state in signal frames https://git.kernel.org/arm64/c/16f47bb9ac8a [27/40] arm64/ptrace: Expose GCS via ptrace and core files https://git.kernel.org/arm64/c/7ec3b57cb29f [28/40] arm64: Add Kconfig for Guarded Control Stack (GCS) https://git.kernel.org/arm64/c/5d8b172e7005 [29/40] kselftest/arm64: Verify the GCS hwcap https://git.kernel.org/arm64/c/7a2f671db61f [30/40] kselftest/arm64: Add GCS as a detected feature in the signal tests https://git.kernel.org/arm64/c/b2d2f11ff5d6 [31/40] kselftest/arm64: Add framework support for GCS to signal handling tests https://git.kernel.org/arm64/c/0d426f7dd9a0 [32/40] kselftest/arm64: Allow signals tests to specify an expected si_code https://git.kernel.org/arm64/c/956573ac1890 [33/40] kselftest/arm64: Always run signals tests with GCS enabled https://git.kernel.org/arm64/c/42155a8eb0f6 [34/40] kselftest/arm64: Add very basic GCS test program https://git.kernel.org/arm64/c/3d37d4307e0f [35/40] kselftest/arm64: Add a GCS test program built with the system libc https://git.kernel.org/arm64/c/a505a52b4e29 [36/40] kselftest/arm64: Add test coverage for GCS mode locking https://git.kernel.org/arm64/c/58d69a3e3582 [37/40] kselftest/arm64: Add GCS signal tests https://git.kernel.org/arm64/c/794b64ca5665 [38/40] kselftest/arm64: Add a GCS stress test https://git.kernel.org/arm64/c/05e6cfff58c4 [39/40] kselftest/arm64: Enable GCS for the FP stress tests https://git.kernel.org/arm64/c/bb9ae1a66c85
The arm64 Guarded Control Stack (GCS) feature provides support for hardware protected stacks of return addresses, intended to provide hardening against return oriented programming (ROP) attacks and to make it easier to gather call stacks for applications such as profiling. When GCS is active a secondary stack called the Guarded Control Stack is maintained, protected with a memory attribute which means that it can only be written with specific GCS operations. The current GCS pointer can not be directly written to by userspace. When a BL is executed the value stored in LR is also pushed onto the GCS, and when a RET is executed the top of the GCS is popped and compared to LR with a fault being raised if the values do not match. GCS operations may only be performed on GCS pages, a data abort is generated if they are not. The combination of hardware enforcement and lack of extra instructions in the function entry and exit paths should result in something which has less overhead and is more difficult to attack than a purely software implementation like clang's shadow stacks. This series implements support for use of GCS by userspace, along with support for use of GCS within KVM guests. It does not enable use of GCS by either EL1 or EL2, this will be implemented separately. Executables are started without GCS and must use a prctl() to enable it, it is expected that this will be done very early in application execution by the dynamic linker or other startup code. For dynamic linking this will be done by checking that everything in the executable is marked as GCS compatible. x86 has an equivalent feature called shadow stacks, this series depends on the x86 patches for generic memory management support for the new guarded/shadow stack page type and shares APIs as much as possible. As there has been extensive discussion with the wider community around the ABI for shadow stacks I have as far as practical kept implementation decisions close to those for x86, anticipating that review would lead to similar conclusions in the absence of strong reasoning for divergence. The main divergence I am concious of is that x86 allows shadow stack to be enabled and disabled repeatedly, freeing the shadow stack for the thread whenever disabled, while this implementation keeps the GCS allocated after disable but refuses to reenable it. This is to avoid races with things actively walking the GCS during a disable, we do anticipate that some systems will wish to disable GCS at runtime but are not aware of any demand for subsequently reenabling it. x86 uses an arch_prctl() to manage enable and disable, since only x86 and S/390 use arch_prctl() a generic prctl() was proposed[1] as part of a patch set for the equivalent RISC-V Zicfiss feature which I initially adopted fairly directly but following review feedback has been revised quite a bit. We currently maintain the x86 pattern of implicitly allocating a shadow stack for threads started with shadow stack enabled, there has been some discussion of removing this support and requiring the use of clone3() with explicit allocation of shadow stacks instead. I have no strong feelings either way, implicit allocation is not really consistent with anything else we do and creates the potential for errors around thread exit but on the other hand it is existing ABI on x86 and minimises the changes needed in userspace code. glibc and bionic changes using this ABI have been implemented and tested. Headless Android systems have been validated and Ross Burton has used this code has been used to bring up a Yocto system with GCS enabed as standard, a test implementation of V8 support has also been done. uprobes are not currently supported, missing emulation was identified late in review. There is an open issue with support for CRIU, on x86 this required the ability to set the GCS mode via ptrace. This series supports configuring mode bits other than enable/disable via ptrace but it needs to be confirmed if this is sufficient. It is likely that we could relax some of the barriers added here with some more targeted placements, this is left for further study. There is an in process series adding clone3() support for shadow stacks: https://lore.kernel.org/r/20240819-clone3-shadow-stack-v9-0-962d74f99464@kernel.org Previous versions of this series depended on that, this dependency has been removed in order to make merging easier. [1] https://lore.kernel.org/lkml/20240403234054.2020347-1-debug@rivosinc.com/ Signed-off-by: Mark Brown <broonie@kernel.org> --- Changes in v13: - Rebase onto v6.12-rc1. - Allocate VM_HIGH_ARCH_6 since protection keys used all the existing bits. - Implement mm_release() and free transparently allocated GCSs there. - Use bit 32 of AT_HWCAP for GCS due to AT_HWCAP2 being filled. - Since we now only set GCSCRE0_EL1 on change ensure that it is initialised with GCSPR_EL0 accessible to EL0. - Fix OOM handling on thread copy. - Link to v12: https://lore.kernel.org/r/20240829-arm64-gcs-v12-0-42fec947436a@kernel.org Changes in v12: - Clarify and simplify the signal handling code so we work with the register state. - When checking for write aborts to shadow stack pages ensure the fault is a data abort. - Depend on !UPROBES. - Comment cleanups. - Link to v11: https://lore.kernel.org/r/20240822-arm64-gcs-v11-0-41b81947ecb5@kernel.org Changes in v11: - Remove the dependency on the addition of clone3() support for shadow stacks, rebasing onto v6.11-rc3. - Make ID_AA64PFR1_EL1.GCS writeable in KVM. - Hide GCS registers when GCS is not enabled for KVM guests. - Require HCRX_EL2.GCSEn if booting at EL1. - Require that GCSCR_EL1 and GCSCRE0_EL1 be initialised regardless of if we boot at EL2 or EL1. - Remove some stray use of bit 63 in signal cap tokens. - Warn if we see a GCS with VM_SHARED. - Remove rdundant check for VM_WRITE in fault handling. - Cleanups and clarifications in the ABI document. - Clean up and improve documentation of some sync placement. - Only set the EL0 GCS mode if it's actually changed. - Various minor fixes and tweaks. - Link to v10: https://lore.kernel.org/r/20240801-arm64-gcs-v10-0-699e2bd2190b@kernel.org Changes in v10: - Fix issues with THP. - Tighten up requirements for initialising GCSCR*. - Only generate GCS signal frames for threads using GCS. - Only context switch EL1 GCS registers if S1PIE is enabled. - Move context switch of GCSCRE0_EL1 to EL0 context switch. - Make GCS registers unconditionally visible to userspace. - Use FHU infrastructure. - Don't change writability of ID_AA64PFR1_EL1 for KVM. - Remove unused arguments from alloc_gcs(). - Typo fixes. - Link to v9: https://lore.kernel.org/r/20240625-arm64-gcs-v9-0-0f634469b8f0@kernel.org Changes in v9: - Rebase onto v6.10-rc3. - Restructure and clarify memory management fault handling. - Fix up basic-gcs for the latest clone3() changes. - Convert to newly merged KVM ID register based feature configuration. - Fixes for NV traps. - Link to v8: https://lore.kernel.org/r/20240203-arm64-gcs-v8-0-c9fec77673ef@kernel.org Changes in v8: - Invalidate signal cap token on stack when consuming. - Typo and other trivial fixes. - Don't try to use process_vm_write() on GCS, it intentionally does not work. - Fix leak of thread GCSs. - Rebase onto latest clone3() series. - Link to v7: https://lore.kernel.org/r/20231122-arm64-gcs-v7-0-201c483bd775@kernel.org Changes in v7: - Rebase onto v6.7-rc2 via the clone3() patch series. - Change the token used to cap the stack during signal handling to be compatible with GCSPOPM. - Fix flags for new page types. - Fold in support for clone3(). - Replace copy_to_user_gcs() with put_user_gcs(). - Link to v6: https://lore.kernel.org/r/20231009-arm64-gcs-v6-0-78e55deaa4dd@kernel.org Changes in v6: - Rebase onto v6.6-rc3. - Add some more gcsb_dsync() barriers following spec clarifications. - Due to ongoing discussion around clone()/clone3() I've not updated anything there, the behaviour is the same as on previous versions. - Link to v5: https://lore.kernel.org/r/20230822-arm64-gcs-v5-0-9ef181dd6324@kernel.org Changes in v5: - Don't map any permissions for user GCSs, we always use EL0 accessors or use a separate mapping of the page. - Reduce the standard size of the GCS to RLIMIT_STACK/2. - Enforce a PAGE_SIZE alignment requirement on map_shadow_stack(). - Clarifications and fixes to documentation. - More tests. - Link to v4: https://lore.kernel.org/r/20230807-arm64-gcs-v4-0-68cfa37f9069@kernel.org Changes in v4: - Implement flags for map_shadow_stack() allowing the cap and end of stack marker to be enabled independently or not at all. - Relax size and alignment requirements for map_shadow_stack(). - Add more blurb explaining the advantages of hardware enforcement. - Link to v3: https://lore.kernel.org/r/20230731-arm64-gcs-v3-0-cddf9f980d98@kernel.org Changes in v3: - Rebase onto v6.5-rc4. - Add a GCS barrier on context switch. - Add a GCS stress test. - Link to v2: https://lore.kernel.org/r/20230724-arm64-gcs-v2-0-dc2c1d44c2eb@kernel.org Changes in v2: - Rebase onto v6.5-rc3. - Rework prctl() interface to allow each bit to be locked independently. - map_shadow_stack() now places the cap token based on the size requested by the caller not the actual space allocated. - Mode changes other than enable via ptrace are now supported. - Expand test coverage. - Various smaller fixes and adjustments. - Link to v1: https://lore.kernel.org/r/20230716-arm64-gcs-v1-0-bf567f93bba6@kernel.org --- Mark Brown (40): mm: Introduce ARCH_HAS_USER_SHADOW_STACK mm: Define VM_HIGH_ARCH_6 arm64/mm: Restructure arch_validate_flags() for extensibility prctl: arch-agnostic prctl for shadow stack mman: Add map_shadow_stack() flags arm64: Document boot requirements for Guarded Control Stacks arm64/gcs: Document the ABI for Guarded Control Stacks arm64/sysreg: Add definitions for architected GCS caps arm64/gcs: Add manual encodings of GCS instructions arm64/gcs: Provide put_user_gcs() arm64/gcs: Provide basic EL2 setup to allow GCS usage at EL0 and EL1 arm64/cpufeature: Runtime detection of Guarded Control Stack (GCS) arm64/mm: Allocate PIE slots for EL0 guarded control stack mm: Define VM_SHADOW_STACK for arm64 when we support GCS arm64/mm: Map pages for guarded control stack KVM: arm64: Manage GCS access and registers for guests arm64/idreg: Add overrride for GCS arm64/hwcap: Add hwcap for GCS arm64/traps: Handle GCS exceptions arm64/mm: Handle GCS data aborts arm64/gcs: Context switch GCS state for EL0 arm64/gcs: Ensure that new threads have a GCS arm64/gcs: Implement shadow stack prctl() interface arm64/mm: Implement map_shadow_stack() arm64/signal: Set up and restore the GCS context for signal handlers arm64/signal: Expose GCS state in signal frames arm64/ptrace: Expose GCS via ptrace and core files arm64: Add Kconfig for Guarded Control Stack (GCS) kselftest/arm64: Verify the GCS hwcap kselftest/arm64: Add GCS as a detected feature in the signal tests kselftest/arm64: Add framework support for GCS to signal handling tests kselftest/arm64: Allow signals tests to specify an expected si_code kselftest/arm64: Always run signals tests with GCS enabled kselftest/arm64: Add very basic GCS test program kselftest/arm64: Add a GCS test program built with the system libc kselftest/arm64: Add test coverage for GCS mode locking kselftest/arm64: Add GCS signal tests kselftest/arm64: Add a GCS stress test kselftest/arm64: Enable GCS for the FP stress tests KVM: selftests: arm64: Add GCS registers to get-reg-list Documentation/admin-guide/kernel-parameters.txt | 3 + Documentation/arch/arm64/booting.rst | 32 + Documentation/arch/arm64/elf_hwcaps.rst | 4 + Documentation/arch/arm64/gcs.rst | 230 +++++++ Documentation/arch/arm64/index.rst | 1 + Documentation/filesystems/proc.rst | 2 +- arch/arm64/Kconfig | 21 + arch/arm64/include/asm/cpufeature.h | 6 + arch/arm64/include/asm/el2_setup.h | 30 + arch/arm64/include/asm/esr.h | 28 +- arch/arm64/include/asm/exception.h | 2 + arch/arm64/include/asm/gcs.h | 107 +++ arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/asm/kvm_host.h | 12 + arch/arm64/include/asm/mman.h | 23 +- arch/arm64/include/asm/mmu_context.h | 9 + arch/arm64/include/asm/pgtable-prot.h | 14 +- arch/arm64/include/asm/processor.h | 7 + arch/arm64/include/asm/sysreg.h | 20 + arch/arm64/include/asm/uaccess.h | 40 ++ arch/arm64/include/asm/vncr_mapping.h | 2 + arch/arm64/include/uapi/asm/hwcap.h | 3 +- arch/arm64/include/uapi/asm/ptrace.h | 8 + arch/arm64/include/uapi/asm/sigcontext.h | 9 + arch/arm64/kernel/cpufeature.c | 23 + arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/entry-common.c | 23 + arch/arm64/kernel/pi/idreg-override.c | 2 + arch/arm64/kernel/process.c | 94 +++ arch/arm64/kernel/ptrace.c | 62 +- arch/arm64/kernel/signal.c | 227 ++++++- arch/arm64/kernel/traps.c | 11 + arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 31 + arch/arm64/kvm/sys_regs.c | 27 +- arch/arm64/mm/Makefile | 1 + arch/arm64/mm/fault.c | 40 ++ arch/arm64/mm/gcs.c | 254 +++++++ arch/arm64/mm/mmap.c | 9 +- arch/arm64/tools/cpucaps | 1 + arch/x86/Kconfig | 1 + arch/x86/include/uapi/asm/mman.h | 3 - fs/proc/task_mmu.c | 2 +- include/linux/mm.h | 18 +- include/uapi/asm-generic/mman.h | 4 + include/uapi/linux/elf.h | 1 + include/uapi/linux/prctl.h | 22 + kernel/sys.c | 30 + mm/Kconfig | 6 + tools/testing/selftests/arm64/Makefile | 2 +- tools/testing/selftests/arm64/abi/hwcap.c | 19 + tools/testing/selftests/arm64/fp/assembler.h | 15 + tools/testing/selftests/arm64/fp/fpsimd-test.S | 2 + tools/testing/selftests/arm64/fp/sve-test.S | 2 + tools/testing/selftests/arm64/fp/za-test.S | 2 + tools/testing/selftests/arm64/fp/zt-test.S | 2 + tools/testing/selftests/arm64/gcs/.gitignore | 5 + tools/testing/selftests/arm64/gcs/Makefile | 24 + tools/testing/selftests/arm64/gcs/asm-offsets.h | 0 tools/testing/selftests/arm64/gcs/basic-gcs.c | 357 ++++++++++ tools/testing/selftests/arm64/gcs/gcs-locking.c | 200 ++++++ .../selftests/arm64/gcs/gcs-stress-thread.S | 311 +++++++++ tools/testing/selftests/arm64/gcs/gcs-stress.c | 530 +++++++++++++++ tools/testing/selftests/arm64/gcs/gcs-util.h | 100 +++ tools/testing/selftests/arm64/gcs/libc-gcs.c | 728 +++++++++++++++++++++ tools/testing/selftests/arm64/signal/.gitignore | 1 + .../testing/selftests/arm64/signal/test_signals.c | 17 +- .../testing/selftests/arm64/signal/test_signals.h | 6 + .../selftests/arm64/signal/test_signals_utils.c | 32 +- .../selftests/arm64/signal/test_signals_utils.h | 39 ++ .../arm64/signal/testcases/gcs_exception_fault.c | 62 ++ .../selftests/arm64/signal/testcases/gcs_frame.c | 88 +++ .../arm64/signal/testcases/gcs_write_fault.c | 67 ++ .../selftests/arm64/signal/testcases/testcases.c | 7 + .../selftests/arm64/signal/testcases/testcases.h | 1 + tools/testing/selftests/kvm/aarch64/get-reg-list.c | 28 + 75 files changed, 4120 insertions(+), 34 deletions(-) --- base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc change-id: 20230303-arm64-gcs-e311ab0d8729 Best regards,