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Tue, 5 Nov 2024 12:04:35 -0800 From: Nicolin Chen <nicolinc@nvidia.com> To: <jgg@nvidia.com>, <kevin.tian@intel.com>, <corbet@lwn.net> CC: <joro@8bytes.org>, <suravee.suthikulpanit@amd.com>, <will@kernel.org>, <robin.murphy@arm.com>, <dwmw2@infradead.org>, <shuah@kernel.org>, <iommu@lists.linux.dev>, <linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-kselftest@vger.kernel.org>, <baolu.lu@linux.intel.com>, <eric.auger@redhat.com>, <jean-philippe@linaro.org>, <mdf@kernel.org>, <mshavit@google.com>, <shameerali.kolothum.thodi@huawei.com>, <smostafa@google.com>, <yi.l.liu@intel.com>, <aik@amd.com>, <zhangfei.gao@linaro.org>, <patches@lists.linux.dev> Subject: [PATCH v7 00/13] iommufd: Add vIOMMU infrastructure (Part-1) Date: Tue, 5 Nov 2024 12:04:16 -0800 Message-ID: <cover.1730836219.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: <linux-kselftest.vger.kernel.org> List-Subscribe: <mailto:linux-kselftest+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kselftest+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029927:EE_|SA1PR12MB9001:EE_ X-MS-Office365-Filtering-Correlation-Id: cba53aa5-16f3-41ea-02e4-08dcfdd51bc0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|36860700013|1800799024; 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iommufd: Add vIOMMU infrastructure (Part-1)
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On Tue, Nov 05, 2024 at 12:04:16PM -0800, Nicolin Chen wrote: > This series introduces a new vIOMMU infrastructure and related ioctls. > > IOMMUFD has been using the HWPT infrastructure for all cases, including a > nested IO page table support. Yet, there're limitations for an HWPT-based > structure to support some advanced HW-accelerated features, such as CMDQV > on NVIDIA Grace, and HW-accelerated vIOMMU on AMD. Even for a multi-IOMMU > environment, it is not straightforward for nested HWPTs to share the same > parent HWPT (stage-2 IO pagetable), with the HWPT infrastructure alone: a > parent HWPT typically hold one stage-2 IO pagetable and tag it with only > one ID in the cache entries. When sharing one large stage-2 IO pagetable > across physical IOMMU instances, that one ID may not always be available > across all the IOMMU instances. In other word, it's ideal for SW to have > a different container for the stage-2 IO pagetable so it can hold another > ID that's available. And this container will be able to hold some advanced > feature too. Applied to iommufd for-next, thanks Jason