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Sat, 17 May 2025 20:22:19 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v5 14/29] iommufd/viommu: Add IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl Date: Sat, 17 May 2025 20:21:31 -0700 Message-ID: <5c509f092ba61d4c0852ba57b530888ffb864ccb.1747537752.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F64:EE_|IA0PR12MB7625:EE_ X-MS-Office365-Filtering-Correlation-Id: 7eeb89c3-1094-4b96-fd60-08dd95bb3a88 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|36860700013|1800799024|82310400026|7416014|376014; X-Microsoft-Antispam-Message-Info: KWGrGbFZkUFMlkbyyvwa89lVD9+x1YNZvmnVCj4OiqhbxRXeqIOX1oKsl8jZUeHUlzFWlX7hUnYGncqrsx3NGNFQYvq+tk4mSrEEVvymebbzvBqgvV0AFTm3nVAmjWmCqXM16pGnbY/hfAijky0MpHjjmjp4DM7yhLdtA+U71etiqPDXu43/hvILIPkhbyjF3BQ2czlkJEEITSp5V33PSX/hL+C8fGOz00PlTZ4Cdih45LFc/eA5V1ItPxq7kplC3zpXpw9z7e2Zd2q0YZJpHtO2a+0hqXIZJDd77We38bCcpRSrkNt4HdesjJ6/GEYDqZlM/UZavf+GQhsiwntGXvtrRhwpXJmx6DaroUMXZkGSFVHEG9+X2PiemNnW+UUz7J5QznXCMk3bysSgdbgpAtl+Sm197/U7Aq6wfyVuw0+JmywmjlzPks7CuqiVVN0rpaozXKNftYTthhm0FipgUKKrFby5Tdp7Wb50r8D2lvjnlk/sJXTqf2HoZ5WjvMfqh5TuISmLtXyfXWXvwa8Ei3iUJ4Vn0gW6jWsQVoHNWVm7VzwtJxki0kVtCLyHq1hll+q2D4+m5o5y3pCwGjezSubyhCRVOPlLKilVDotkJwAIKPvgtotnoV2s0iAihQYy80VdOWLq0u8yG6+3SBNN8xOOEAKMWSc24DlcrXeYAw9BXeVDoVJ9vz5+HHR5gswtFZwSpRM+vq7I8ucvMPg+t8QDoHzXcUKB8Ut8w9jwMog22+DQ+2G8LW7rFktQKDBa2jseMphuBUBz+Z7KyGJOlcyRaAHrFw8UOQdmLvmHY2nBLoq0C5zrF1Xr/71gib1w07/jv2405YsH7gCZTtXeefZZfVf2tBrhcnBFR/RBeUSoToiVopeDYgG+WQSBi/wjN9Z5SelJyqceRHqrNnEX8MFx5rJYxcYlifo1r71sXy+/TisCjz6hrnAD2ySkblfX+ziOZuO9rsXcE3MALETgulPj8Xf0lMZhrwA7pNsWVMkGPH2mxU/m6HcIrLKk1JDhe2cVrERWFOK5DxLLxsNmShwX2nqA3DtbYRjzVwMF0yu3/gorLxM/BI9vw0Rf28AL9+2WHcLOK4AntF6auGQK0mJjwNGoW0nUexTvw6AaFB5jZZBLDrWlQvLH/rfJjOQRN/36yfTcc4TVpkQiC45ogGMjqluzezaG7lQ+HHv56Kj8xGk4RB6RDCGu0p9LiiZt3xEgZ3OJDJpPO/eowPlZfmxttc6jYe9ZF12xQO57izHuzYYYvJZcoeWQ0bpU3gsZPxHbcMB6yb3nYjtZKPy0Hap8H6vul11i6vaLKUZIhkSyupz0Nr28LMMQfk9Wufz7dTGrFzfLEHd9xkKA3gpnzNdho5oq/mmWfcCIMytwXR5SbnvI3FmUSODkfU5iDTRaMpMlrjwKATaoRaZ2jVztFnyyvWnM/QPT4PiulKxwy1yNygyfK4/hv8x9Lsa12FTWn4sNbxwtULeNZQNLJ1l8lSMxDXE7sny4v9t7NBOqyQpbfBGPjkJnnWtcVxr6Ebmt X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(7416014)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2025 03:22:32.8939 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7eeb89c3-1094-4b96-fd60-08dd95bb3a88 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7625 Introduce a new IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl for user space to allocate a HW QUEUE object for a vIOMMU specific HW-accelerated queue, e.g.: - NVIDIA's Virtual Command Queue - AMD vIOMMU's Command Buffer, Event Log Buffer, and PPR Log Buffer This is a vIOMMU based ioctl. Simply increase the refcount of the vIOMMU. Reviewed-by: Pranjal Shrivastava Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_private.h | 2 + include/uapi/linux/iommufd.h | 45 ++++++++++ drivers/iommu/iommufd/main.c | 6 ++ drivers/iommu/iommufd/viommu.c | 105 ++++++++++++++++++++++++ 4 files changed, 158 insertions(+) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 35088478cb07..a94d04ab0d2c 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -603,6 +603,8 @@ int iommufd_viommu_alloc_ioctl(struct iommufd_ucmd *ucmd); void iommufd_viommu_destroy(struct iommufd_object *obj); int iommufd_vdevice_alloc_ioctl(struct iommufd_ucmd *ucmd); void iommufd_vdevice_destroy(struct iommufd_object *obj); +int iommufd_hw_queue_alloc_ioctl(struct iommufd_ucmd *ucmd); +void iommufd_hw_queue_destroy(struct iommufd_object *obj); #ifdef CONFIG_IOMMUFD_TEST int iommufd_test(struct iommufd_ucmd *ucmd); diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index 272da7324a2b..aeed0127553e 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -56,6 +56,7 @@ enum { IOMMUFD_CMD_VDEVICE_ALLOC = 0x91, IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92, IOMMUFD_CMD_VEVENTQ_ALLOC = 0x93, + IOMMUFD_CMD_HW_QUEUE_ALLOC = 0x94, }; /** @@ -1147,4 +1148,48 @@ struct iommu_veventq_alloc { __u32 __reserved; }; #define IOMMU_VEVENTQ_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VEVENTQ_ALLOC) + +/** + * enum iommu_hw_queue_type - HW Queue Type + * @IOMMU_HW_QUEUE_TYPE_DEFAULT: Reserved for future use + */ +enum iommu_hw_queue_type { + IOMMU_HW_QUEUE_TYPE_DEFAULT = 0, +}; + +/** + * struct iommu_hw_queue_alloc - ioctl(IOMMU_HW_QUEUE_ALLOC) + * @size: sizeof(struct iommu_hw_queue_alloc) + * @flags: Must be 0 + * @viommu_id: Virtual IOMMU ID to associate the HW queue with + * @type: One of enum iommu_hw_queue_type + * @index: The logical index to the HW queue per virtual IOMMU for a multi-queue + * model + * @out_hw_queue_id: The ID of the new HW queue + * @nesting_parent_iova: Base address of the queue memory in the guest physical + * address space + * @length: Length of the queue memory + * + * Allocate a HW queue object for a vIOMMU-specific HW-accelerated queue, which + * allows HW to access a guest queue memory described using @nesting_parent_iova + * and @length. + * + * Upon success, the underlying physical pages of the guest queue memory will be + * pinned to prevent VMM from unmapping them in the IOAS until the HW queue gets + * destroyed. + * + * A vIOMMU can allocate multiple queues, but it must use a different @index to + * separate each allocation, e.g. HW queue0, HW queue1, ... + */ +struct iommu_hw_queue_alloc { + __u32 size; + __u32 flags; + __u32 viommu_id; + __u32 type; + __u32 index; + __u32 out_hw_queue_id; + __aligned_u64 nesting_parent_iova; + __aligned_u64 length; +}; +#define IOMMU_HW_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HW_QUEUE_ALLOC) #endif diff --git a/drivers/iommu/iommufd/main.c b/drivers/iommu/iommufd/main.c index c6d0b446e632..0750e740fa1d 100644 --- a/drivers/iommu/iommufd/main.c +++ b/drivers/iommu/iommufd/main.c @@ -304,6 +304,7 @@ union ucmd_buffer { struct iommu_destroy destroy; struct iommu_fault_alloc fault; struct iommu_hw_info info; + struct iommu_hw_queue_alloc hw_queue; struct iommu_hwpt_alloc hwpt; struct iommu_hwpt_get_dirty_bitmap get_dirty_bitmap; struct iommu_hwpt_invalidate cache; @@ -346,6 +347,8 @@ static const struct iommufd_ioctl_op iommufd_ioctl_ops[] = { struct iommu_fault_alloc, out_fault_fd), IOCTL_OP(IOMMU_GET_HW_INFO, iommufd_get_hw_info, struct iommu_hw_info, __reserved), + IOCTL_OP(IOMMU_HW_QUEUE_ALLOC, iommufd_hw_queue_alloc_ioctl, + struct iommu_hw_queue_alloc, length), IOCTL_OP(IOMMU_HWPT_ALLOC, iommufd_hwpt_alloc, struct iommu_hwpt_alloc, __reserved), IOCTL_OP(IOMMU_HWPT_GET_DIRTY_BITMAP, iommufd_hwpt_get_dirty_bitmap, @@ -509,6 +512,9 @@ static const struct iommufd_object_ops iommufd_object_ops[] = { [IOMMUFD_OBJ_FAULT] = { .destroy = iommufd_fault_destroy, }, + [IOMMUFD_OBJ_HW_QUEUE] = { + .destroy = iommufd_hw_queue_destroy, + }, [IOMMUFD_OBJ_HWPT_PAGING] = { .destroy = iommufd_hwpt_paging_destroy, .abort = iommufd_hwpt_paging_abort, diff --git a/drivers/iommu/iommufd/viommu.c b/drivers/iommu/iommufd/viommu.c index 7248fb7c7baf..9b4e99babdb4 100644 --- a/drivers/iommu/iommufd/viommu.c +++ b/drivers/iommu/iommufd/viommu.c @@ -164,3 +164,108 @@ int iommufd_vdevice_alloc_ioctl(struct iommufd_ucmd *ucmd) iommufd_put_object(ucmd->ictx, &viommu->obj); return rc; } + +void iommufd_hw_queue_destroy(struct iommufd_object *obj) +{ + struct iommufd_hw_queue *hw_queue = + container_of(obj, struct iommufd_hw_queue, obj); + struct iommufd_viommu *viommu = hw_queue->viommu; + + if (viommu->ops->hw_queue_destroy) + viommu->ops->hw_queue_destroy(hw_queue); + iopt_unpin_pages(&viommu->hwpt->ioas->iopt, hw_queue->base_addr, + hw_queue->length, true); + refcount_dec(&viommu->obj.users); +} + +int iommufd_hw_queue_alloc_ioctl(struct iommufd_ucmd *ucmd) +{ + struct iommu_hw_queue_alloc *cmd = ucmd->cmd; + struct iommufd_hw_queue *hw_queue; + struct iommufd_viommu *viommu; + struct page **pages; + int max_npages, i; + u64 last, offset; + int rc; + + if (cmd->flags || cmd->type == IOMMU_HW_QUEUE_TYPE_DEFAULT) + return -EOPNOTSUPP; + if (!cmd->nesting_parent_iova || !cmd->length) + return -EINVAL; + if (check_add_overflow(cmd->nesting_parent_iova, cmd->length - 1, + &last)) + return -EOVERFLOW; + + viommu = iommufd_get_viommu(ucmd, cmd->viommu_id); + if (IS_ERR(viommu)) + return PTR_ERR(viommu); + + if (!viommu->ops || !viommu->ops->hw_queue_alloc) { + rc = -EOPNOTSUPP; + goto out_put_viommu; + } + + offset = + cmd->nesting_parent_iova - PAGE_ALIGN(cmd->nesting_parent_iova); + max_npages = DIV_ROUND_UP(offset + cmd->length, PAGE_SIZE); + pages = kcalloc(max_npages, sizeof(*pages), GFP_KERNEL); + if (!pages) { + rc = -ENOMEM; + goto out_put_viommu; + } + + /* + * The underlying physical pages must be pinned to prevent them from + * being unmapped (via IOMMUFD_CMD_IOAS_UNMAP) during the life cycle + * of the HW QUEUE object. And the pages should be contiguous too. + */ + if (viommu->ops->flags & IOMMUFD_VIOMMU_FLAG_HW_QUEUE_READS_PA) { + rc = iopt_pin_pages(&viommu->hwpt->ioas->iopt, + cmd->nesting_parent_iova, cmd->length, + pages, 0, true); + if (rc) + goto out_free; + + /* Validate if the underlying physical pages are contiguous */ + for (i = 1; i < max_npages && pages[i]; i++) { + if (page_to_pfn(pages[i]) == + page_to_pfn(pages[i - 1]) + 1) + continue; + rc = -EFAULT; + goto out_unpin; + } + } + + hw_queue = viommu->ops->hw_queue_alloc(ucmd, viommu, cmd->type, + cmd->index, + cmd->nesting_parent_iova, + cmd->length); + if (IS_ERR(hw_queue)) { + rc = PTR_ERR(hw_queue); + goto out_unpin; + } + + /* The iommufd_hw_queue_alloc helper saves ictx in hw_queue->ictx */ + if (WARN_ON_ONCE(hw_queue->ictx != ucmd->ictx)) { + rc = -EINVAL; + goto out_unpin; + } + + hw_queue->viommu = viommu; + refcount_inc(&viommu->obj.users); + hw_queue->length = cmd->length; + hw_queue->base_addr = cmd->nesting_parent_iova; + cmd->out_hw_queue_id = hw_queue->obj.id; + rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd)); + goto out_put_viommu; + +out_unpin: + if (viommu->ops->flags & IOMMUFD_VIOMMU_FLAG_HW_QUEUE_READS_PA) + iopt_unpin_pages(&viommu->hwpt->ioas->iopt, + cmd->nesting_parent_iova, cmd->length, true); +out_free: + kfree(pages); +out_put_viommu: + iommufd_put_object(ucmd->ictx, &viommu->obj); + return rc; +}