diff mbox series

[04/14] dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding

Message ID 1608199173-28760-5-git-send-email-victor.liu@nxp.com
State Superseded
Headers show
Series Add some DRM bridge drivers support for i.MX8qm/qxp SoCs | expand

Commit Message

Liu Ying Dec. 17, 2020, 9:59 a.m. UTC
This patch adds bindings for i.MX8qm/qxp pixel combiner.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
 .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++
 1 file changed, 160 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml

Comments

Rob Herring Dec. 17, 2020, 6:50 p.m. UTC | #1
On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qm/qxp pixel combiner.
> 
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++
>  1 file changed, 160 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dts:19:18: fatal error: dt-bindings/clock/imx8-lpcg.h: No such file or directory
   19 |         #include <dt-bindings/clock/imx8-lpcg.h>
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1364: dt_binding_check] Error 2

See https://patchwork.ozlabs.org/patch/1417599

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.
Liu Ying Dec. 18, 2020, 1:45 a.m. UTC | #2
Hi,

On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> > 
> > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > ---
> >  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++
> >  1 file changed, 160 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> > 
> 
> My bot found errors running 'make dt_binding_check' on your patch:
> 
> yamllint warnings/errors:
> 
> dtschema/dtc warnings/errors:
> Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dts:19:18: fatal error: dt-bindings/clock/imx8-lpcg.h: No such file or directory
>    19 |         #include <dt-bindings/clock/imx8-lpcg.h>
>       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> compilation terminated.
> make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dt.yaml] Error 1
> make[1]: *** Waiting for unfinished jobs....
> make: *** [Makefile:1364: dt_binding_check] Error 2
> 
> See https://patchwork.ozlabs.org/patch/1417599
> 
> This check can fail if there are any dependencies. The base for a patch
> series is generally the most recent rc1.

This series can be applied to linux-next/master branch.
The header file 'imx8-lpcg.h' was added with the below commit on that
branch:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/include/dt-bindings/clock/imx8-lpcg.h?id=540742fb109fa4a65f116db9edc28ab1bd2c872d

With that header file, this patch may pass 'make dt_binding_check'. 

Regards,
Liu Ying

> 
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
> 
> pip3 install dtschema --upgrade
> 
> Please check and re-submit.
>
Rob Herring Dec. 18, 2020, 10:42 p.m. UTC | #3
On Thu, Dec 17, 2020 at 7:48 PM Liu Ying <victor.liu@nxp.com> wrote:
>
> Hi,
>
> On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> > On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> > >
> > > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > > ---
> > >  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++
> > >  1 file changed, 160 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> > >
> >
> > My bot found errors running 'make dt_binding_check' on your patch:
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> > Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dts:19:18: fatal error: dt-bindings/clock/imx8-lpcg.h: No such file or directory
> >    19 |         #include <dt-bindings/clock/imx8-lpcg.h>
> >       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > compilation terminated.
> > make[1]: *** [scripts/Makefile.lib:342: Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.example.dt.yaml] Error 1
> > make[1]: *** Waiting for unfinished jobs....
> > make: *** [Makefile:1364: dt_binding_check] Error 2
> >
> > See https://patchwork.ozlabs.org/patch/1417599
> >
> > This check can fail if there are any dependencies. The base for a patch
> > series is generally the most recent rc1.
>
> This series can be applied to linux-next/master branch.

I can't know that to apply and run checks automatically. I guessed
that reviewing this before sending, but I want it abundantly clear
what the result of applying this might be and it wasn't mentioned in
this patch.

Plus linux-next is a base no one can apply patches to, so should you
be sending patches based on it? It's also the merge window, so maybe
wait until rc1 when your dependency is in and the patch can actually
be applied. Also, the drm-misc folks will still need to know they need
to merge rc1 in before this is applied.

Rob
Rob Herring Dec. 21, 2020, 10:07 p.m. UTC | #4
On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qm/qxp pixel combiner.
> 
> Signed-off-by: Liu Ying <victor.liu@nxp.com>
> ---
>  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++
>  1 file changed, 160 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> new file mode 100644
> index 00000000..bacacd8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
> @@ -0,0 +1,160 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX8qm/qxp Pixel Combiner
> +
> +maintainers:
> +  - Liu Ying <victor.liu@nxp.com>
> +
> +description: |
> +  The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
> +  single display controller and manipulates the two streams to support a number
> +  of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
> +  either one screen, two screens, or virtual screens.  The pixel combiner is
> +  also responsible for generating some of the control signals for the pixel link
> +  output channel.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - fsl,imx8qm-pixel-combiner
> +      - fsl,imx8qxp-pixel-combiner
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 0
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    const: apb
> +
> +  power-domains:
> +    maxItems: 1
> +
> +patternProperties:
> +  "^channel@[0-1]$":
> +    type: object
> +    description: Represents a display stream of pixel combiner.
> +
> +    properties:
> +      "#address-cells":
> +        const: 1
> +
> +      "#size-cells":
> +        const: 0
> +
> +      reg:
> +        description: The display stream index.
> +        oneOf:
> +          - const: 0
> +          - const: 1

enum: [ 0, 1 ]

> +
> +      port@0:
> +        type: object
> +        description: Input endpoint of the display stream.
> +
> +        properties:
> +          reg:
> +            const: 0
> +
> +        required:
> +          - reg

You can drop 'reg' parts. That's going to get covered by the graph 
schema.

> +
> +      port@1:
> +        type: object
> +        description: Output endpoint of the display stream.
> +
> +        properties:
> +          reg:
> +            const: 1
> +
> +        required:
> +          - reg
> +
> +    required:
> +      - "#address-cells"
> +      - "#size-cells"
> +      - reg
> +      - port@0
> +      - port@1
> +
> +    additionalProperties: false
> +
> +required:
> +  - compatible
> +  - "#address-cells"
> +  - "#size-cells"
> +  - reg
> +  - clocks
> +  - clock-names
> +  - power-domains
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/imx8-lpcg.h>
> +    #include <dt-bindings/firmware/imx/rsrc.h>
> +    pixel-combiner@56020000 {
> +        compatible = "fsl,imx8qxp-pixel-combiner";
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +        reg = <0x56020000 0x10000>;
> +        clocks = <&dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4>;
> +        clock-names = "apb";
> +        power-domains = <&pd IMX_SC_R_DC_0>;
> +
> +        channel@0 {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            reg = <0>;
> +
> +            port@0 {
> +                reg = <0>;
> +
> +                dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint {
> +                    remote-endpoint = <&dc0_dpu_disp0_dc0_pixel_combiner_ch0>;
> +                };
> +            };
> +
> +            port@1 {
> +                reg = <1>;
> +
> +                dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint {
> +                    remote-endpoint = <&dc0_pixel_link0_dc0_pixel_combiner_ch0>;
> +                };
> +            };
> +        };
> +
> +        channel@1 {
> +            #address-cells = <1>;
> +            #size-cells = <0>;
> +            reg = <1>;
> +
> +            port@0 {
> +                reg = <0>;
> +
> +                dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint {
> +                    remote-endpoint = <&dc0_dpu_disp1_dc0_pixel_combiner_ch1>;
> +                };
> +            };
> +
> +            port@1 {
> +                reg = <1>;
> +
> +                dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint {
> +                    remote-endpoint = <&dc0_pixel_link1_dc0_pixel_combiner_ch1>;
> +                };
> +            };
> +        };
> +    };
> -- 
> 2.7.4
>
Liu Ying Dec. 22, 2020, 2:44 a.m. UTC | #5
On Mon, 2020-12-21 at 10:02 -0700, Rob Herring wrote:
> On Fri, Dec 18, 2020 at 9:15 PM Liu Ying <victor.liu@nxp.com> wrote:
> > Hi,
> > 
> > On Fri, 2020-12-18 at 16:42 -0600, Rob Herring wrote:
> > > On Thu, Dec 17, 2020 at 7:48 PM Liu Ying <victor.liu@nxp.com> wrote:
> > > > Hi,
> > > > 
> > > > On Thu, 2020-12-17 at 12:50 -0600, Rob Herring wrote:
> > > > > On Thu, 17 Dec 2020 17:59:23 +0800, Liu Ying wrote:
> > > > > > This patch adds bindings for i.MX8qm/qxp pixel combiner.
> > > > > > 
> > > > > > Signed-off-by: Liu Ying <victor.liu@nxp.com>
> > > > > > ---
> > > > > >  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160
> > > > > > +++++++++++++++++++++
> > > > > >  1 file changed, 160 insertions(+)
> > > > > >  create mode 100644
> > > > > > Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-
> > > > > > pixel-combiner.yaml
> > > > > > 
> > > > > 
> > > > > My bot found errors running 'make dt_binding_check' on your
> > > > > patch:
> > > > > 
> > > > > yamllint warnings/errors:
> > > > > 
> > > > > dtschema/dtc warnings/errors:
> > > > > Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-
> > > > > pixel-combiner.example.dts:19:18: fatal error: dt-
> > > > > bindings/clock/imx8-lpcg.h: No such file or directory
> > > > >    19 |         #include <dt-bindings/clock/imx8-lpcg.h>
> > > > >       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> > > > > compilation terminated.
> > > > > make[1]: *** [scripts/Makefile.lib:342:
> > > > > Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-
> > > > > pixel-combiner.example.dt.yaml] Error 1
> > > > > make[1]: *** Waiting for unfinished jobs....
> > > > > make: *** [Makefile:1364: dt_binding_check] Error 2
> > > > > 
> > > > > See
> > > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.ozlabs.org%2Fpatch%2F1417599&amp;data=04%7C01%7Cvictor.liu%40nxp.com%7C7cd8e43f582b48535f8f08d8a5d235eb%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441669585674325%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=%2BWYPU1JU4sLsE8ULeoAKvaEUBqHQAPyuydkA50%2Ffjvs%3D&amp;reserved=0
> > > > > 
> > > > > This check can fail if there are any dependencies. The base for a
> > > > > patch
> > > > > series is generally the most recent rc1.
> > > > 
> > > > This series can be applied to linux-next/master branch.
> > > 
> > > I can't know that to apply and run checks automatically. I guessed
> > > that reviewing this before sending, but I want it abundantly clear
> > > what the result of applying this might be and it wasn't mentioned in
> > > this patch.
> > > 
> > > Plus linux-next is a base no one can apply patches to, so should you
> > > be sending patches based on it? It's also the merge window, so maybe
> > 
> > I sent this series based on drm-misc-next.  This series is applicable
> > to linux-next/master, and may pass 'make dt_binding_check' there.
> 
> But to be clear, 'make dt_binding_check' would fail on drm-misc-next
> until 5.11-rc1 is merged in. The drm-misc maintainers need to know
> that.

Ok, will mention the dependency.  Thanks.

> 
> 
> > I'll mention dependencies in the future where similar situations
> > appear. Thanks.
> > 
> > BTW, does it make sense for the bot to additionaly try linux-next if
> > needed?  Maybe, that'll be helpful?
> 
> Sure, and when I've got nothing else to do maybe I'll do that. Though
> maintainers still need to know what the dependencies are. The real
> solution here is to make 'base-commit' tags more common or required so
> that neither scripts/bots nor humans have to guess what the base is.

Yeah, 'base-commit' is good, but a base commit should be 'well-known'
as doc[1] indicates, otherwise, it is likely unfound.  So, it seems
that linux-next is worthy of a try.

[1] https://git-scm.com/docs/git-format-patch

Regards,
Liu Ying

> 
> Rob
Liu Ying Dec. 22, 2020, 2:59 a.m. UTC | #6
On Mon, 2020-12-21 at 15:07 -0700, Rob Herring wrote:
> On Thu, Dec 17, 2020 at 05:59:23PM +0800, Liu Ying wrote:

> > This patch adds bindings for i.MX8qm/qxp pixel combiner.

> > 

> > Signed-off-by: Liu Ying <victor.liu@nxp.com>

> > ---

> >  .../display/bridge/fsl,imx8qxp-pixel-combiner.yaml | 160 +++++++++++++++++++++

> >  1 file changed, 160 insertions(+)

> >  create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml

> > 

> > diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml

> > new file mode 100644

> > index 00000000..bacacd8

> > --- /dev/null

> > +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml

> > @@ -0,0 +1,160 @@

> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

> > +%YAML 1.2

> > +---

> > +$id: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Ffsl%2Cimx8qxp-pixel-combiner.yaml%23&amp;data=04%7C01%7Cvictor.liu%40nxp.com%7Ca98fcf2b328a42c15d1308d8a5fcc905%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441852425445153%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=%2FvqD2n1aI5sBaXbCHhsWCjp91Zk1wB8q69xNEssRVvE%3D&amp;reserved=0

> > +$schema: https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cvictor.liu%40nxp.com%7Ca98fcf2b328a42c15d1308d8a5fcc905%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637441852425455147%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=h15%2FU7V8yTNeUPmnR%2FSGNolEHOYQwQ9gHyKwdoyg2q4%3D&amp;reserved=0

> > +

> > +title: Freescale i.MX8qm/qxp Pixel Combiner

> > +

> > +maintainers:

> > +  - Liu Ying <victor.liu@nxp.com>

> > +

> > +description: |

> > +  The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a

> > +  single display controller and manipulates the two streams to support a number

> > +  of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as

> > +  either one screen, two screens, or virtual screens.  The pixel combiner is

> > +  also responsible for generating some of the control signals for the pixel link

> > +  output channel.

> > +

> > +properties:

> > +  compatible:

> > +    enum:

> > +      - fsl,imx8qm-pixel-combiner

> > +      - fsl,imx8qxp-pixel-combiner

> > +

> > +  "#address-cells":

> > +    const: 1

> > +

> > +  "#size-cells":

> > +    const: 0

> > +

> > +  reg:

> > +    maxItems: 1

> > +

> > +  clocks:

> > +    maxItems: 1

> > +

> > +  clock-names:

> > +    const: apb

> > +

> > +  power-domains:

> > +    maxItems: 1

> > +

> > +patternProperties:

> > +  "^channel@[0-1]$":

> > +    type: object

> > +    description: Represents a display stream of pixel combiner.

> > +

> > +    properties:

> > +      "#address-cells":

> > +        const: 1

> > +

> > +      "#size-cells":

> > +        const: 0

> > +

> > +      reg:

> > +        description: The display stream index.

> > +        oneOf:

> > +          - const: 0

> > +          - const: 1

> 

> enum: [ 0, 1 ]


I forgot to modify this oneOf + const to enum.
Will do.  Thanks.

> 

> > +

> > +      port@0:

> > +        type: object

> > +        description: Input endpoint of the display stream.

> > +

> > +        properties:

> > +          reg:

> > +            const: 0

> > +

> > +        required:

> > +          - reg

> 

> You can drop 'reg' parts. That's going to get covered by the graph 

> schema.


I'm assuming the 'const' numbers for 'reg' parts are still needed, so
I'll keep the 'const' parts.

I'll drop 'required' parts for 'reg'.

Liu Ying

> 

> > +

> > +      port@1:

> > +        type: object

> > +        description: Output endpoint of the display stream.

> > +

> > +        properties:

> > +          reg:

> > +            const: 1

> > +

> > +        required:

> > +          - reg

> > +

> > +    required:

> > +      - "#address-cells"

> > +      - "#size-cells"

> > +      - reg

> > +      - port@0

> > +      - port@1

> > +

> > +    additionalProperties: false

> > +

> > +required:

> > +  - compatible

> > +  - "#address-cells"

> > +  - "#size-cells"

> > +  - reg

> > +  - clocks

> > +  - clock-names

> > +  - power-domains

> > +

> > +additionalProperties: false

> > +

> > +examples:

> > +  - |

> > +    #include <dt-bindings/clock/imx8-lpcg.h>

> > +    #include <dt-bindings/firmware/imx/rsrc.h>

> > +    pixel-combiner@56020000 {

> > +        compatible = "fsl,imx8qxp-pixel-combiner";

> > +        #address-cells = <1>;

> > +        #size-cells = <0>;

> > +        reg = <0x56020000 0x10000>;

> > +        clocks = <&dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4>;

> > +        clock-names = "apb";

> > +        power-domains = <&pd IMX_SC_R_DC_0>;

> > +

> > +        channel@0 {

> > +            #address-cells = <1>;

> > +            #size-cells = <0>;

> > +            reg = <0>;

> > +

> > +            port@0 {

> > +                reg = <0>;

> > +

> > +                dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint {

> > +                    remote-endpoint = <&dc0_dpu_disp0_dc0_pixel_combiner_ch0>;

> > +                };

> > +            };

> > +

> > +            port@1 {

> > +                reg = <1>;

> > +

> > +                dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint {

> > +                    remote-endpoint = <&dc0_pixel_link0_dc0_pixel_combiner_ch0>;

> > +                };

> > +            };

> > +        };

> > +

> > +        channel@1 {

> > +            #address-cells = <1>;

> > +            #size-cells = <0>;

> > +            reg = <1>;

> > +

> > +            port@0 {

> > +                reg = <0>;

> > +

> > +                dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint {

> > +                    remote-endpoint = <&dc0_dpu_disp1_dc0_pixel_combiner_ch1>;

> > +                };

> > +            };

> > +

> > +            port@1 {

> > +                reg = <1>;

> > +

> > +                dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint {

> > +                    remote-endpoint = <&dc0_pixel_link1_dc0_pixel_combiner_ch1>;

> > +                };

> > +            };

> > +        };

> > +    };

> > -- 

> > 2.7.4

> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
new file mode 100644
index 00000000..bacacd8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml
@@ -0,0 +1,160 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qm/qxp Pixel Combiner
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+description: |
+  The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
+  single display controller and manipulates the two streams to support a number
+  of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
+  either one screen, two screens, or virtual screens.  The pixel combiner is
+  also responsible for generating some of the control signals for the pixel link
+  output channel.
+
+properties:
+  compatible:
+    enum:
+      - fsl,imx8qm-pixel-combiner
+      - fsl,imx8qxp-pixel-combiner
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: apb
+
+  power-domains:
+    maxItems: 1
+
+patternProperties:
+  "^channel@[0-1]$":
+    type: object
+    description: Represents a display stream of pixel combiner.
+
+    properties:
+      "#address-cells":
+        const: 1
+
+      "#size-cells":
+        const: 0
+
+      reg:
+        description: The display stream index.
+        oneOf:
+          - const: 0
+          - const: 1
+
+      port@0:
+        type: object
+        description: Input endpoint of the display stream.
+
+        properties:
+          reg:
+            const: 0
+
+        required:
+          - reg
+
+      port@1:
+        type: object
+        description: Output endpoint of the display stream.
+
+        properties:
+          reg:
+            const: 1
+
+        required:
+          - reg
+
+    required:
+      - "#address-cells"
+      - "#size-cells"
+      - reg
+      - port@0
+      - port@1
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - reg
+  - clocks
+  - clock-names
+  - power-domains
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8-lpcg.h>
+    #include <dt-bindings/firmware/imx/rsrc.h>
+    pixel-combiner@56020000 {
+        compatible = "fsl,imx8qxp-pixel-combiner";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        reg = <0x56020000 0x10000>;
+        clocks = <&dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4>;
+        clock-names = "apb";
+        power-domains = <&pd IMX_SC_R_DC_0>;
+
+        channel@0 {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            reg = <0>;
+
+            port@0 {
+                reg = <0>;
+
+                dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint {
+                    remote-endpoint = <&dc0_dpu_disp0_dc0_pixel_combiner_ch0>;
+                };
+            };
+
+            port@1 {
+                reg = <1>;
+
+                dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint {
+                    remote-endpoint = <&dc0_pixel_link0_dc0_pixel_combiner_ch0>;
+                };
+            };
+        };
+
+        channel@1 {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            reg = <1>;
+
+            port@0 {
+                reg = <0>;
+
+                dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint {
+                    remote-endpoint = <&dc0_dpu_disp1_dc0_pixel_combiner_ch1>;
+                };
+            };
+
+            port@1 {
+                reg = <1>;
+
+                dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint {
+                    remote-endpoint = <&dc0_pixel_link1_dc0_pixel_combiner_ch1>;
+                };
+            };
+        };
+    };