From patchwork Wed Nov 21 11:15:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 151660 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1790166ljp; Wed, 21 Nov 2018 03:16:39 -0800 (PST) X-Google-Smtp-Source: AFSGD/Wb4gKLThlPMXA4AzF/WdVYwzqw/5sx7A3D9X+xVv10Ht0kB9/LkMKpcMiJvelH49kTczcX X-Received: by 2002:a63:b94c:: with SMTP id v12mr5533525pgo.221.1542798999458; Wed, 21 Nov 2018 03:16:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542798999; cv=none; d=google.com; s=arc-20160816; b=bfwkCLHmYu5IuCHClbIiDqHhz8PEAiXFJNW5XPnzylp/sLOKEEE4gfwLivBAkbxq1x x5EXIcm+LogBNknt43sHePPjb/93QCfRF02dlnxSw+dtsx+TVprJaKv+XdimOwMW1pxi hEqTBTMvyAkM39RapDmfaP4/Ji7PJBKUL+qqEv/KbZqThXiPJpSN/fkS3+O16247Bjsh Djlo7mqO193loBsaQbntWhtWpRToeeiewKGdzJYhq5DOtN94kOOkJopEKhjzLpylPd+v G7wWWzQ7vZtYc5KftjcTgYN9WHBSig0nWw1iHlpCnmDM/u8sdoGutU/mYqDCejuswAaa XTNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=O/lqWEOmJGaOH6tQ9BihzsFfBg0BfEe6nbbb5s6cf1s=; b=aaskBW/aTxeYUI24I1iOpbFmHnmTbFjFijM/GwlsHgpRjIgJtQym981bwrFur0raNC D7ro2hrpXC+vm0d7HEKigIJ5hIrm3mYjRanTGqb1HcX3YUt/aTIiF+EijdtaMT18D0IJ I7yJf5EI8XeZEPRAUUhWJ1+Ty0cZ4AcQbApj+wK23kqdcrGwXrzSyqzk0rXCs1/bzPTB Byj3sPNkia/yrwx9NyWzfh4nEFkR5WUHB6fVfH/jWISS03zgQ5z7421Zx0LHN+u4aF6W wsqptCr3dxe9+B/el1tTPp5tbVgF+pznSMQyJ5pWPQ+BDYQYkfurjzNxNpccvxbO0Q8T yjOQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FII3XqAL; spf=pass (google.com: best guess record for domain of linux-media-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-media-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n3si9574252pfn.285.2018.11.21.03.16.39; Wed, 21 Nov 2018 03:16:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-media-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FII3XqAL; spf=pass (google.com: best guess record for domain of linux-media-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-media-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730044AbeKUVug (ORCPT + 4 others); Wed, 21 Nov 2018 16:50:36 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:37711 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730035AbeKUVug (ORCPT ); Wed, 21 Nov 2018 16:50:36 -0500 Received: by mail-wm1-f65.google.com with SMTP id p2-v6so5323586wmc.2 for ; Wed, 21 Nov 2018 03:16:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=O/lqWEOmJGaOH6tQ9BihzsFfBg0BfEe6nbbb5s6cf1s=; b=FII3XqAL+f5GjiIhTJPvxpZI7acnfih0HcOx+3xZFZwA8YkvLl3ySRmVzQ3+how//7 1fXHh3CQpEsXuaSroBAjwH2rebnHPUjbINGIYGa4MJ2Vzj6T3HsUFAz0GjFSftynsB14 Hkhw6VtW4JC2UZm0aFCDaqp4l6OaWv01ZqPXM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=O/lqWEOmJGaOH6tQ9BihzsFfBg0BfEe6nbbb5s6cf1s=; b=FfDKSM4/qIAaeyCTVvyAlHydLLnIcB0wQnE2CPcMxKOkxbOk/XW9igg4iwgxMh9IbH UDQRExllFw6Kf0WPDE+kyPFPSXI2RiZioupfSHW8iRebPzrrqed0XcpL16cTjdZNzwOl P9YpbMq8DMzLObujRmccduwoctI7QYOI/HXCUHeoEuFHeLJw1Dc9avITF4annWoEqADF UhL7LYFIG4N7MzYr2JTlgUMc7vuGoVIF3+sUj7n+M+faQWYH4o6WrctRpsjYcG+/mJFY VLhZMVO/fDbBCykI6W8LEtPjgrlHOW3gmhtGnPVj74zcbgv87EE2Wqx5+ecw+LKkxMvU LL6g== X-Gm-Message-State: AA+aEWaD2KtiUI/fZde7wkjMjNtm9CbI9EQrKP7X6ki8I7MNlBek41XV 6CssyCFos1jfTsF1PJdeLmg7Yg== X-Received: by 2002:a1c:2104:: with SMTP id h4-v6mr5092434wmh.130.1542798995220; Wed, 21 Nov 2018 03:16:35 -0800 (PST) Received: from arch-late.local (a109-49-46-234.cpe.netcabo.pt. [109.49.46.234]) by smtp.gmail.com with ESMTPSA id a125-v6sm771526wmf.8.2018.11.21.03.16.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Nov 2018 03:16:34 -0800 (PST) From: Rui Miguel Silva To: sakari.ailus@linux.intel.com, Philipp Zabel Cc: linux-media@vger.kernel.org, devel@driverdev.osuosl.org, devicetree@vger.kernel.org, Greg Kroah-Hartman , Rui Miguel Silva Subject: [PATCH v8 05/12] media: dt-bindings: add bindings for i.MX7 media driver Date: Wed, 21 Nov 2018 11:15:51 +0000 Message-Id: <20181121111558.10838-6-rui.silva@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181121111558.10838-1-rui.silva@linaro.org> References: <20181121111558.10838-1-rui.silva@linaro.org> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add bindings documentation for i.MX7 media drivers. The imx7 MIPI CSI2 and imx7 CMOS Sensor Interface. Signed-off-by: Rui Miguel Silva Reviewed-by: Rob Herring Acked-by: Sakari Ailus --- .../devicetree/bindings/media/imx7-csi.txt | 45 ++++++++++ .../bindings/media/imx7-mipi-csi2.txt | 90 +++++++++++++++++++ 2 files changed, 135 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/imx7-csi.txt create mode 100644 Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt -- 2.19.1 diff --git a/Documentation/devicetree/bindings/media/imx7-csi.txt b/Documentation/devicetree/bindings/media/imx7-csi.txt new file mode 100644 index 000000000000..171b089ee91f --- /dev/null +++ b/Documentation/devicetree/bindings/media/imx7-csi.txt @@ -0,0 +1,45 @@ +Freescale i.MX7 CMOS Sensor Interface +===================================== + +csi node +-------- + +This is device node for the CMOS Sensor Interface (CSI) which enables the chip +to connect directly to external CMOS image sensors. + +Required properties: + +- compatible : "fsl,imx7-csi"; +- reg : base address and length of the register set for the device; +- interrupts : should contain CSI interrupt; +- clocks : list of clock specifiers, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details; +- clock-names : must contain "axi", "mclk" and "dcic" entries, matching + entries in the clock property; + +The device node shall contain one 'port' child node with one child 'endpoint' +node, according to the bindings defined in: + Documentation/devicetree/bindings/media/video-interfaces.txt. + +In the following example a remote endpoint is a video multiplexer. + +example: + + csi: csi@30710000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "fsl,imx7-csi"; + reg = <0x30710000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_CLK_DUMMY>, + <&clks IMX7D_CSI_MCLK_ROOT_CLK>, + <&clks IMX7D_CLK_DUMMY>; + clock-names = "axi", "mclk", "dcic"; + + port { + csi_from_csi_mux: endpoint { + remote-endpoint = <&csi_mux_to_csi>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt b/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt new file mode 100644 index 000000000000..71fd74ed3ec8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/imx7-mipi-csi2.txt @@ -0,0 +1,90 @@ +Freescale i.MX7 Mipi CSI2 +========================= + +mipi_csi2 node +-------------- + +This is the device node for the MIPI CSI-2 receiver core in i.MX7 SoC. It is +compatible with previous version of Samsung D-phy. + +Required properties: + +- compatible : "fsl,imx7-mipi-csi2"; +- reg : base address and length of the register set for the device; +- interrupts : should contain MIPI CSIS interrupt; +- clocks : list of clock specifiers, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details; +- clock-names : must contain "pclk", "wrap" and "phy" entries, matching + entries in the clock property; +- power-domains : a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- reset-names : should include following entry "mrst"; +- resets : a list of phandle, should contain reset entry of + reset-names; +- phy-supply : from the generic phy bindings, a phandle to a regulator that + provides power to MIPI CSIS core; + +Optional properties: + +- clock-frequency : The IP's main (system bus) clock frequency in Hz, default + value when this property is not specified is 166 MHz; +- fsl,csis-hs-settle : differential receiver (HS-RX) settle time; + +The device node should contain two 'port' child nodes with one child 'endpoint' +node, according to the bindings defined in: + Documentation/devicetree/bindings/ media/video-interfaces.txt. + The following are properties specific to those nodes. + +port node +--------- + +- reg : (required) can take the values 0 or 1, where 0 shall be + related to the sink port and port 1 shall be the source + one; + +endpoint node +------------- + +- data-lanes : (required) an array specifying active physical MIPI-CSI2 + data input lanes and their mapping to logical lanes; this + shall only be applied to port 0 (sink port), the array's + content is unused only its length is meaningful, + in this case the maximum length supported is 2; + +example: + + mipi_csi: mipi-csi@30750000 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "fsl,imx7-mipi-csi2"; + reg = <0x30750000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_IPG_ROOT_CLK>, + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; + clock-names = "pclk", "wrap", "phy"; + clock-frequency = <166000000>; + power-domains = <&pgc_mipi_phy>; + phy-supply = <®_1p0d>; + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; + reset-names = "mrst"; + fsl,csis-hs-settle = <3>; + + port@0 { + reg = <0>; + + mipi_from_sensor: endpoint { + remote-endpoint = <&ov2680_to_mipi>; + data-lanes = <1>; + }; + }; + + port@1 { + reg = <1>; + + mipi_vc0_to_csi_mux: endpoint { + remote-endpoint = <&csi_mux_from_mipi_vc0>; + }; + }; + };