@@ -346,6 +346,7 @@ static inline void vepu_write_relaxed(struct hantro_dev *vpu,
static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ wmb(); /* flush encoder previous relaxed writes */
regmap_write(vpu->regs_enc, reg, val);
}
@@ -354,6 +355,7 @@ static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
u32 val;
regmap_read(vpu->regs_enc, reg, &val);
+ rmb(); /* read encoder swreg data in order */
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
return val;
@@ -369,6 +371,7 @@ static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ wmb();/* flush decoder previous relaxed writes */
regmap_write(vpu->regs_dec, reg, val);
}
@@ -377,6 +380,7 @@ static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
u32 val;
regmap_read(vpu->regs_dec, reg, &val);
+ rmb(); /* read decoder swreg data in order */
vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
return val;
@@ -21,6 +21,7 @@ struct regmap_config hantro_regmap_dec = {
.reg_stride = 4,
/* all hantro accesses are sequential, even with respect to irq ctx */
.disable_locking = true,
+ .use_relaxed_mmio = true,
.name = "hantro_regmap_dec",
};
This is done to match the pre-regmap membarrier behaviour, ensuring default regmap_write calls in _relaxed() are indeed relaxed while the non-relaxed versions include an explicit mem-barrier call. Signed-off-by: Adrian Ratiu <adrian.ratiu@collabora.com> --- drivers/staging/media/hantro/hantro.h | 4 ++++ drivers/staging/media/hantro/hantro_regmap.c | 1 + 2 files changed, 5 insertions(+)