From patchwork Fri Sep 1 15:57:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alain Volmat X-Patchwork-Id: 719644 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86A0CCA0FE5 for ; Fri, 1 Sep 2023 16:02:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245350AbjIAQC0 (ORCPT ); Fri, 1 Sep 2023 12:02:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38820 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245128AbjIAQCZ (ORCPT ); Fri, 1 Sep 2023 12:02:25 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A050D10F9; Fri, 1 Sep 2023 09:02:11 -0700 (PDT) Received: from pps.filterd (m0369458.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 381BVHwV028094; Fri, 1 Sep 2023 18:01:52 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=EGKNdq9Nui49sEfUU4mf+1UuMBLpLUUs4YTE9AXf2Zo=; b=Ao 3SELvQWSdSrYUBCmor1OWNToHTMB8oxT2rYcLi2ZXAnCQy1KRfkafBJgp7xQwRVR YIoanQCm6lkLYYKrrPlXqWU7jCQ+eA3jNw1WeUf+L+T9xuG8nTBBxg5smQC/iG5Q 3/NK3PfQRb1leHR9tKA5kfGNcnVPXEZfmcPMqo+sEBtFqBC9mDRqorldhRDQqukC wkGhpbCVqQeqXfmnbSCIqptbKZJ8khi7nHNf2A0k81Qykd1UCTQTc51qNoQ5uIm8 SD8iNUOxsPNRA5vEA3tGnAEKz4bYGkQ74qnI2PhTsKzZ3PhAI2e/KvPHzzwCNKp2 ZvL6iA1C2ryVVeGEhmkA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3sqty084cw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 01 Sep 2023 18:01:52 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 08765100056; Fri, 1 Sep 2023 18:01:52 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EE603242ADA; Fri, 1 Sep 2023 18:01:51 +0200 (CEST) Received: from localhost (10.129.178.213) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 1 Sep 2023 18:01:51 +0200 From: Alain Volmat To: Hugues Fruchet , Alain Volmat , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Russell King , Philipp Zabel CC: Sakari Ailus , Dan Scally , , , , , Subject: [PATCH v3 4/5] ARM: dts: stm32: add dcmipp support to stm32mp135 Date: Fri, 1 Sep 2023 17:57:23 +0200 Message-ID: <20230901155732.252436-5-alain.volmat@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230901155732.252436-1-alain.volmat@foss.st.com> References: <20230901155732.252436-1-alain.volmat@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.129.178.213] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-01_13,2023-08-31_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org From: Hugues Fruchet Add dcmipp support to STM32MP135. Signed-off-by: Hugues Fruchet Signed-off-by: Alain Volmat Reviewed-by: Laurent Pinchart --- arch/arm/boot/dts/st/stm32mp135.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi index abf2acd37b4e..beee9ec7ed0d 100644 --- a/arch/arm/boot/dts/st/stm32mp135.dtsi +++ b/arch/arm/boot/dts/st/stm32mp135.dtsi @@ -8,5 +8,13 @@ / { soc { + dcmipp: dcmipp@5a000000 { + compatible = "st,stm32mp13-dcmipp"; + reg = <0x5a000000 0x400>; + interrupts = ; + resets = <&rcc DCMIPP_R>; + clocks = <&rcc DCMIPP_K>; + status = "disabled"; + }; }; };