From patchwork Thu May 22 17:56:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 892354 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2081.outbound.protection.outlook.com [40.107.21.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C60C29B8DB; Thu, 22 May 2025 17:57:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.81 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747936671; cv=fail; b=KoXjdegrhyh+tdPOyGlfmOGQfGodkxW6MpH2hJpngqxZCjNtslhFcCGYPq0RqFYN2axiR94jv3hZ+8wqkrC36NCS0bawtwUpe160pCYlnS6ZLZT1i5nJXWyP09y+yBBJhTdkc7q7pPSlLZNgF0+YXmWEDdFfVUh9j06W7Ysrf74= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747936671; c=relaxed/simple; bh=FPa4YzYlpLsluVUau8kaPkuqmo5jDaC+9IpQrQmhdAE=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=m3vAO6Cv7UROvhATaPshnzuxNpP2RpPesJfEXbUlzVZsxVgTk1U/ESOpVPj674Rz0D/oXJlE9QEL3m28EvBG3qfBtzpqXc9YDpeySMgmw+fHrZazeMwiLs4rifGkWp/OaG7nRugxcAAzTffVc+/iM+mcIIkD0H2ZrGSQJuLinW0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=jNQrgQpr; arc=fail smtp.client-ip=40.107.21.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="jNQrgQpr" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=cisLzvNniZLuzUT6pYGvK/230WE6g/O8SDT2rzC4JE/aDGILolQj2R4RHjrUqkFz0BXqJRHDGV7HtyQYH6DYJFd2RMF7To1GQKUpShS1j76DK3vXo10p305Eb4gyMSUB5NHTPUOCt8+FsHf6svAzKTYON+YgzDhCMlWNSyR44SUfIfMeqCfX0+k/p3WZGSSfMnGhOqKRy9kdv7yGvjlzJIILm76thJsuayGu+4PLIXYFlKVmP05C10HpBoXZe+M+tQzgwjPr2981yKbn5ZuRUAeciavS2+R5EHWftMqyHWTK3qqPHprESQwqXcfUBQHPjtyIiTkuTJo/RR5RQqyC+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/MMt3cwDxpKSObS3qUWZGqRJJRxSNYTh00DQoNXLMuc=; b=qVVTReSD5tuIqKhaevzlr2QtslDbUST4PUdjlKK94f7AEu6GDYKdUK38nL+nqLk/ENIBJ9VIYdvr+FKgI3Dwef+9UBvnU9F+UXU1vcxsZiA1ujMKsSbeMyfsdwO6z9W5WmUep5v5MPpRaI6IazTZAWPOsIu0/9CV+FNIvbRlD6axWU3Xxq5NnteuXr530lCQh2uEbc2I/nRe+NC1bm+zBJNlv9tm9fuw8++l/z26RfSETk42Xz3h9gtikFLunz+ZEHrpV5/2PTxQKsmWb371vMFrfDLboPs3Y7kRQmnPUopMjpspQPQbyJrdukCBehwLra4VobWde37KOrUnS6db7g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/MMt3cwDxpKSObS3qUWZGqRJJRxSNYTh00DQoNXLMuc=; b=jNQrgQproRQOPyNk35ETmBKCnZW/uELJW4Pm03W3zilYkn1S4TItaHCgocWZI0Bgo5wOJI2SxHAdrwpp5wYm4xojzJj6wuJBRgqgHt/elTZJRwFYXmSg6KFAt8+I2qkOVWLVDxxXN7De63HfHS4p1oRMM3HOKt3SJ4BHQW1lzOs/r3SipYmZ86D+zIVNjA39B+U2lEqqTaHej4X3MRAFyRKWlxTTtXsK5Sw+5760TKAA+Sn9MCGcGgQ/YKH1tD02dZxwap5ZR28q9AAfQtT2D5HQJh+vWIuQgnIGDHdOwHkJXg5h0fP4DLkPYSvVv2qnEne5cPZ/m5YNqD5/pI+sHQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) by FRWPR04MB11272.eurprd04.prod.outlook.com (2603:10a6:d10:19c::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8769.21; Thu, 22 May 2025 17:57:46 +0000 Received: from PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06]) by PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06%2]) with mapi id 15.20.8746.030; Thu, 22 May 2025 17:57:46 +0000 From: Frank Li Date: Thu, 22 May 2025 13:56:48 -0400 Subject: [PATCH v5 10/13] media: imx8mq-mipi-csi2: Add support for i.MX8QXP Message-Id: <20250522-8qxp_camera-v5-10-d4be869fdb7e@nxp.com> References: <20250522-8qxp_camera-v5-0-d4be869fdb7e@nxp.com> In-Reply-To: <20250522-8qxp_camera-v5-0-d4be869fdb7e@nxp.com> To: Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Frank Li , Rui Miguel Silva , Martin Kepplinger , Purism Kernel Team Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Robert Chiras , "Guoniu.zhou" X-Mailer: b4 0.13-dev-e586c X-Developer-Signature: v=1; a=ed25519-sha256; t=1747936611; l=6189; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=FPa4YzYlpLsluVUau8kaPkuqmo5jDaC+9IpQrQmhdAE=; b=43RmRaZd/pPjCZ1Xh/WtGWTMTBIFQwxsYHgOPtkAUrgsyv8Zo1GSGbW3attfaWJBvUJmPwYXN nyxDjZP6JT5DPIsg5u6W6BHZ0cwJaVTtLo9fA9B7E2k04O3EuXnjPpw X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: BY5PR04CA0006.namprd04.prod.outlook.com (2603:10b6:a03:1d0::16) To PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9642:EE_|FRWPR04MB11272:EE_ X-MS-Office365-Filtering-Correlation-Id: ef1d61e6-4b75-437a-19b7-08dd995a2858 X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|366016|7416014|52116014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?AbYCcKrkeNNseIHf5q14XtXDLDZ4mid?= =?utf-8?q?02kNd5TYgrpcwQL2F9NrF5k+i/ZkxEiKWjf9PkUPGUR/Bri/fuwAPkbXgkpzBNFti?= =?utf-8?q?pniCdeSys8fWPUhaq57LADDMc3W1Dr+wNBEUxd5tKl2+VjVz31fF6l4PidXQmntJx?= =?utf-8?q?8Bs0CnHGBQT3vqKbSvLJk+KoeCOzX+UHD3ywEkJIRbNwdpnUQXbJPw7zSZfDGszPl?= =?utf-8?q?I/Ui4ZlRdujzQZFMYxd55fAJfT+AKVSrdj3cmu5pD/6De17ivM6mRKV+Qby4cgnzq?= =?utf-8?q?POUqXTmAVLgaPvVD+7/VfFwR7+dWAu+2swTXu1XkG8lkXk3WP5DLnFXKNwWaTuqV0?= =?utf-8?q?wX1hGcBlXzfraZ8lPo4SiT8vkoal179E9TFtnqPUaMATIi8HB7kOOA8Ekh/HDFgI2?= =?utf-8?q?SP8mmW7stvYDHOMhp12LWocRlyV2eUtyWSQWQmq6SfHEfPr3+uXMFriwYlVIyN+AX?= =?utf-8?q?D+HQ/cebfFcUqeaBIEv5c7FkoDgSPuSqQjrzOMIDf/jxDjl6CF2q29O/NLw4Eo7xk?= =?utf-8?q?VSXqDLh19rsUu9lhYGk9Ob0VJJlFHUL0BtXVBOh3t3O3CbRlFSPujQDi8MjuTkdE8?= =?utf-8?q?hm/QyzmCqO/Z6tquXZT0zEn1va5JGr9tODSI0V2VqEGdc0/OxjMfV9tYbCgAjXOi9?= =?utf-8?q?BSEpziNwYTS2Gocm5oPRhvYS75s58Zdo+ZkgkjAYAgH6sd+mKktr6nNEYnC8A9m5P?= =?utf-8?q?HhkPJhdwihcoybisp4QRYfkwmbDLnNLM3DUv3HX8zxVTw5sHFbXhc+qZQ/bVRhHL2?= =?utf-8?q?QDQftyZmHpQXXrL0TPbrSocX9jnUWioPfYba3ed8lNAYPZ/bTfalLdsEfjGyDQRmX?= =?utf-8?q?t67CFZRBhwg3U4sg4KwKujnd6sIdXUHM23qQLzD2HQmy9y+BFnf2uhjBnt2uMonUY?= =?utf-8?q?uc9t9uWe13y6iwLXpvXEsyij+DTVgcl2/j5ewK3tuJRW5ROGy8hB1+2RpScRynT0r?= =?utf-8?q?dHX5F9EgOWs9wyf6Knba/aeCHEYp8dytUzN7hJCEGd5DuexuySW6zGmYx/wqmCyKn?= =?utf-8?q?0EMdaka92ayyW7IOXaUSVTKhhXajNtypV/FRVQGZNPiNRhSMths6CHMLkYc4Nio4j?= =?utf-8?q?9Yn2A5vRGJKU6fY5fvNnwUWnwb65IEJNjvICudoZS4mgahI8rbtlRzOb7vdLfjEZs?= =?utf-8?q?t7Ekg2ILQi/vmvYc2H7nSSh9OES8b2z+98nUdQyrs6cKuVh5Q6GrlY8JZAxgSligj?= =?utf-8?q?NBatR7F3vnN8eruYlkcqJuYnWzQf2fgM+rnanZIzktY9wbeS6NoaFXu72ox0z3FjZ?= =?utf-8?q?mVcbs+5C3kHSNlr1xg92apypZKuQobg3VT9px5draP8IezfYM6owFt3mfHjmULyTI?= =?utf-8?q?4e6Y3nK8kjQCp8QhZH87zfIG84mUUtQOmqfUXkkQ9zmXbvU936NpH8dbkc2BC0Wg3?= =?utf-8?q?c0Nr6IOkzvvBvAqvr2E+MwSJ/vKY3uGKvlYyOOHOKW2zWlSuEZhccA=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:PAXPR04MB9642.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(7416014)(52116014)(376014)(1800799024)(921020)(38350700014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?D5W4JScPQ9yOIqOEXBSqHAu0Brqd?= =?utf-8?q?oyRvexnELKjUAqB0ombejmSOOB3IDWCdZCuYlI+oyWjTtDAO7QSWI389wMXnJPy5f?= =?utf-8?q?XrqNJ3jSb6WSUV8pH/wblzv/NJXEreIsYPYVX6gXcRE2YxMmuai2azIUQ9/b/iqXx?= =?utf-8?q?jlENhGLYxxxnrPXYv+DG9+rnoZddhi+G/cxqPSI4vWGvhWrGEGS7dFKS5nzq5tyhf?= =?utf-8?q?kKe70GQC5AytKNHKcKXbOrTye7eKcLq3eiaEMsRaYJFFzqkeRymgh0w9MDuV/ahzW?= =?utf-8?q?RdQoAoqT2Zyy5JFwaSdz2goxufaCqmZl9Jm1oBXfcwtlfeiDkRtzva5669hN3K7go?= =?utf-8?q?V3WdhiM+F/3kT0SRAoVgjfYMxzqqZJn1umXxH2oajIsixBc+xSL4+Kc3u1iDF5HXL?= =?utf-8?q?3sDOgMyFcLpSqZtKSGG1uUolrxkf4EdQzJjZOyv5MMpYUR22nFiRdjJ3OFf4egYGr?= =?utf-8?q?ETjgY6JsFdQvt7Uaivupq40sQhI+3qXBqabE1h5y5U/GJby5pJKOwyOdCMXTz6BAV?= =?utf-8?q?bUsovTXTWIIc/5yB6Rj9vfUU3kKpKTXmAmUkbbDn+4BauVnvdQviDegX1ozfdJpJX?= =?utf-8?q?VQfkTgwrdrEfk9ZVXPW6anEhn7/I6mPPwKDp4ikdRO9OMNd0nLX5ZPU4vURLsxGTf?= =?utf-8?q?MmTiPl+txvFnmw1cth1SrcWwriFebC9Mzntoc5siyePY5V1nhhwdy3XEP0TbkqGvw?= =?utf-8?q?Dwp9XmPOZoeoEofawZ2F17K0e10qnrwG5C2UeE0SeIpOXqeUr1Dnu4dvOTXsxpUOp?= =?utf-8?q?lTly4Qix4MkXRW89dBnDhUl/Zh52DHe9C4uxlqHC4KdY447GCddWVyaBDTpWrAus8?= =?utf-8?q?rx5ugbow/fo7rjAfsrxNNa5/YWLx0X8yae7N6FbIroVERwfBl3n78LlNhDUNG4L8w?= =?utf-8?q?4IxoYB2RqxFR0eq/Mg+oh4fa/7FjIGlgGvFywYN4Auf9uYhtCULYMxyXw8HHzgc9c?= =?utf-8?q?+xPMidxb5EGtq6jP1kbzjgEEsDwLuIrkK2U5dTuQvU3aBgXvfE3fNgWFKftvCKIKL?= =?utf-8?q?4UVj5L5QVBzUWX3N2XDq9QYTM1VQF+a7T7jwjLtXPHRjINMWEo8h2ZG7DYggTSqCk?= =?utf-8?q?caKJ59n2V5AyuzADSrEPKWcIMII1jRzLSfrXyrclGX7tfoK6fkgp4nHHvBiEMkK0y?= =?utf-8?q?8zK4NZVC+vle/7910csM5b+6rZ7zHhzVtqmFU2YX/G0APLVlQ52/WMZEpy+OTB4Fv?= =?utf-8?q?htUgg/RvOqU2FDvlQSoLWyL3//likb2ESHUlyCzAoF1dl3nqJVn/XVXX83DDQ5Gdy?= =?utf-8?q?mmvcN6QiYhDG3mlDthfcSJtnIz+ynSazVcNYPxUS9w1ACDacqeh+OVFJMHL8FTHib?= =?utf-8?q?+kOg1cPyMmK2rWqpz+9r18cN2OgvtQT5+I8MbfETIPFcvH9bGuK1fDxPyY4/N0smI?= =?utf-8?q?7wJr1314ev1RSDjysR4R0Gq+I45IUfkHmaaFsC6Dq5KalRVhFtakOFtgOrCnNuBSp?= =?utf-8?q?8TKJpsAcgsKxF6tfV9WLUjt/LAuLUJbMqJQBZoWVsnTlEycIiBYu4hp0lNiN6NYMa?= =?utf-8?q?yAbo2zK3C/ED?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ef1d61e6-4b75-437a-19b7-08dd995a2858 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2025 17:57:46.1390 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 3Howfv+0X/ygdAMcIheZgO1P1tZS9eKpSDmPa1vcTXCy2O0u2CN0Bobrv5G1/+VNmr1QWcBrmRklJXSGvSr5Lg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: FRWPR04MB11272 Add support for i.MX8QXP, which has a dedicated control and status register (CSR) space. Enable obtaining the second register space and initializing PHY and link settings accordingly. Reviewed-by: Laurent Pinchart Signed-off-by: Frank Li --- change from v4 to v5 - add Laurent Pinchart review tag - wrap some reg_map functions args - add missed \n at error message change from v3 to v4 - remove reset_delay - sort register field defination - fix error messag in dev_err_probe - fix comments - use true for 1 - regmap_clear_bits(state->phy_gpr, CSI2SS_CTRL_CLK_RESET, CSI2SS_CTRL_CLK_RESET_EN); in imx8qxp_gpr_disable() - use regmap_write to clean register at imx8qxp_gpr_enable() - remove reduntant CSI2SS_PLM_CTRL_POLARITY - rename register DATA_TYPE to DATA_TYPE_DISABLE_BF change from v2 to v3 - use dedicate csr reg to control phy and link settings. Change from v1 to v2 - change 8QM go 8QXP, 8QM will failback to 8QXP to keep consisense with phy drivers --- drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 111 ++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c index 59ec7107b4508..6501843ae72db 100644 --- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c +++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c @@ -5,6 +5,7 @@ * Copyright (C) 2021 Purism SPC */ +#include #include #include #include @@ -88,6 +89,7 @@ static const char * const imx8mq_mipi_csi_clk_id[CSI2_NUM_CLKS] = { struct imx8mq_plat_data { int (*enable)(struct csi_state *state, u32 hs_settle); void (*disable)(struct csi_state *state); + bool use_reg_csr; }; /* @@ -167,6 +169,95 @@ static const struct imx8mq_plat_data imx8mq_data = { .enable = imx8mq_gpr_enable, }; +/* ----------------------------------------------------------------------------- + * i.MX8QXP + */ + +#define CSI2SS_PL_CLK_INTERVAL_US 100 +#define CSI2SS_PL_CLK_TIMEOUT_US 100000 + +#define CSI2SS_PLM_CTRL 0x0 +#define CSI2SS_PLM_CTRL_ENABLE_PL BIT(0) +#define CSI2SS_PLM_CTRL_VSYNC_OVERRIDE BIT(9) +#define CSI2SS_PLM_CTRL_HSYNC_OVERRIDE BIT(10) +#define CSI2SS_PLM_CTRL_VALID_OVERRIDE BIT(11) +#define CSI2SS_PLM_CTRL_POLARITY_HIGH BIT(12) +#define CSI2SS_PLM_CTRL_PL_CLK_RUN BIT(31) + +#define CSI2SS_PHY_CTRL 0x4 +#define CSI2SS_PHY_CTRL_RX_ENABLE BIT(0) +#define CSI2SS_PHY_CTRL_AUTO_PD_EN BIT(1) +#define CSI2SS_PHY_CTRL_DDRCLK_EN BIT(2) +#define CSI2SS_PHY_CTRL_CONT_CLK_MODE BIT(3) +#define CSI2SS_PHY_CTRL_RX_HS_SETTLE_MASK GENMASK(9, 4) +#define CSI2SS_PHY_CTRL_RTERM_SEL BIT(21) +#define CSI2SS_PHY_CTRL_PD BIT(22) + +#define CSI2SS_DATA_TYPE_DISABLE_BF 0x38 +#define CSI2SS_DATA_TYPE_DISABLE_BF_MASK GENMASK(23, 0) + +#define CSI2SS_CTRL_CLK_RESET 0x44 +#define CSI2SS_CTRL_CLK_RESET_EN BIT(0) + +static int imx8qxp_gpr_enable(struct csi_state *state, u32 hs_settle) +{ + int ret; + u32 val; + + /* Clear format */ + regmap_clear_bits(state->phy_gpr, CSI2SS_DATA_TYPE_DISABLE_BF, + CSI2SS_DATA_TYPE_DISABLE_BF_MASK); + + regmap_write(state->phy_gpr, CSI2SS_PLM_CTRL, 0x0); + + regmap_write(state->phy_gpr, CSI2SS_PHY_CTRL, + FIELD_PREP(CSI2SS_PHY_CTRL_RX_HS_SETTLE_MASK, hs_settle) | + CSI2SS_PHY_CTRL_RX_ENABLE | CSI2SS_PHY_CTRL_DDRCLK_EN | + CSI2SS_PHY_CTRL_CONT_CLK_MODE | CSI2SS_PHY_CTRL_PD | + CSI2SS_PHY_CTRL_RTERM_SEL | CSI2SS_PHY_CTRL_AUTO_PD_EN); + + ret = regmap_read_poll_timeout(state->phy_gpr, CSI2SS_PLM_CTRL, + val, !(val & CSI2SS_PLM_CTRL_PL_CLK_RUN), + CSI2SS_PL_CLK_INTERVAL_US, + CSI2SS_PL_CLK_TIMEOUT_US); + + if (ret) { + dev_err(state->dev, "Timeout waiting for Pixel-Link clock\n"); + return ret; + } + + /* Enable Pixel link Master */ + regmap_set_bits(state->phy_gpr, CSI2SS_PLM_CTRL, + CSI2SS_PLM_CTRL_ENABLE_PL | CSI2SS_PLM_CTRL_VALID_OVERRIDE); + + /* PHY Enable */ + regmap_clear_bits(state->phy_gpr, CSI2SS_PHY_CTRL, + CSI2SS_PHY_CTRL_PD | CSI2SS_PLM_CTRL_POLARITY_HIGH); + + /* Release Reset */ + regmap_set_bits(state->phy_gpr, CSI2SS_CTRL_CLK_RESET, CSI2SS_CTRL_CLK_RESET_EN); + + return ret; +} + +static void imx8qxp_gpr_disable(struct csi_state *state) +{ + /* Disable Pixel Link */ + regmap_write(state->phy_gpr, CSI2SS_PLM_CTRL, 0x0); + + /* Disable PHY */ + regmap_write(state->phy_gpr, CSI2SS_PHY_CTRL, 0x0); + + regmap_clear_bits(state->phy_gpr, CSI2SS_CTRL_CLK_RESET, + CSI2SS_CTRL_CLK_RESET_EN); +}; + +static const struct imx8mq_plat_data imx8qxp_data = { + .enable = imx8qxp_gpr_enable, + .disable = imx8qxp_gpr_disable, + .use_reg_csr = true, +}; + static const struct csi2_pix_format imx8mq_mipi_csi_formats[] = { /* RAW (Bayer and greyscale) formats. */ { @@ -865,6 +956,25 @@ static int imx8mq_mipi_csi_parse_dt(struct csi_state *state) return PTR_ERR(state->rst); } + if (state->pdata->use_reg_csr) { + const struct regmap_config regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + }; + void __iomem *base; + + base = devm_platform_ioremap_resource(to_platform_device(dev), 1); + if (IS_ERR(base)) + return dev_err_probe(dev, IS_ERR(base), "Missing CSR register\n"); + + state->phy_gpr = devm_regmap_init_mmio(dev, base, ®map_config); + if (IS_ERR(state->phy_gpr)) + return dev_err_probe(dev, PTR_ERR(state->phy_gpr), + "Failed to init CSI MMIO regmap\n"); + return 0; + } + ret = of_property_read_u32_array(np, "fsl,mipi-phy-gpr", out_val, ARRAY_SIZE(out_val)); if (ret) { @@ -984,6 +1094,7 @@ static void imx8mq_mipi_csi_remove(struct platform_device *pdev) static const struct of_device_id imx8mq_mipi_csi_of_match[] = { { .compatible = "fsl,imx8mq-mipi-csi2", .data = &imx8mq_data }, + { .compatible = "fsl,imx8qxp-mipi-csi2", .data = &imx8qxp_data }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, imx8mq_mipi_csi_of_match);