From patchwork Sun Jun 8 23:58:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 894854 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52053267B92; Sun, 8 Jun 2025 23:59:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749427149; cv=none; b=ACd194Sv4ThRWSm1kenFsGGKFxPv41M5tKg0FfZwyKnteyfkXxx76Qyu8t+W4d10DPkd7z3GNUQgLsv1J2+awC0QnY6ZHR+7jDsJLkPc+r1WezmApnZatwgnwvHSlhruLs8ZPGb5cnzet0eeqBQ9HRPCHVt+0HaVfmom9W74Cx0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1749427149; c=relaxed/simple; bh=+eXo/wQ3t4d847B87LJaO7CDqdcaA4L1lss+nyuXzWw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OGnWr08iXsRVHnXTbQuNMPdYFgXqv+X4cVROLsZ1rRmn9i4znIgtRyWbJMmqA0li4xmDOGhM9TWhR+fH5pqu+aZEVGgf/8hhwXRufcp96NO9kze9yt2Ona1dZA6JxTaCVDegVItwrANCKXakhJ0692zXmKEXf48PScSzmUAv+PU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=X0mgdKu5; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="X0mgdKu5" Received: from pendragon.ideasonboard.com (81-175-209-231.bb.dnainternet.fi [81.175.209.231]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 498E91733; Mon, 9 Jun 2025 01:58:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1749427132; bh=+eXo/wQ3t4d847B87LJaO7CDqdcaA4L1lss+nyuXzWw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=X0mgdKu5JhllE45ufOuqVk9O+X5JN7FbHnY4K7PBI8UOpiKr0peZJxgwUlKGDud8V 2TpQ/eB/OgtSxZU4F0K6UcJ/iYol2ijDihKjzR17eqG/qRC/Ho7l2jOduXJxvqijKy x+ZXOcZKVQoHIb4spArEHFhlGSO9wNzIk8m5//A4= From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: Isaac Scott , Rui Miguel Silva , Martin Kepplinger , Purism Kernel Team , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/8] media: imx-mipi-csis: Only set clock rate when specified in DT Date: Mon, 9 Jun 2025 02:58:36 +0300 Message-ID: <20250608235840.23871-5-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250608235840.23871-1-laurent.pinchart@ideasonboard.com> References: <20250608235840.23871-1-laurent.pinchart@ideasonboard.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The imx-mipi-csis driver sets the rate of the wrap clock to the value specified in the device tree's "clock-frequency" property, and defaults to 166 MHz otherwise. This is a historical mistake, as clock rate selection should have been left to the assigned-clock-rates property. Honouring the clock-frequency property can't be removed without breaking backwards compatibility, and the corresponding code isn't very intrusive. The 166 MHz default, on the other hand, prevents configuration of the clock rate through assigned-clock-rates, as the driver immediately overwrites the rate. This behaviour is confusing and has cost debugging time. There is little value in a 166 MHz default. All mainline device tree sources that enable the CSIS specify a clock-frequency explicitly, and the default wrap clock configuration on supported platforms is at least as high as 166 MHz. Drop the default, and only set the clock rate manually when the clock-frequency property is specified. Signed-off-by: Laurent Pinchart --- drivers/media/platform/nxp/imx-mipi-csis.c | 23 +++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/platform/nxp/imx-mipi-csis.c index e27467e6372f..080e40837463 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -230,8 +230,6 @@ #define MIPI_CSIS_PKTDATA_EVEN 0x3000 #define MIPI_CSIS_PKTDATA_SIZE SZ_4K -#define DEFAULT_SCLK_CSIS_FREQ 166000000UL - struct mipi_csis_event { bool debug; u32 mask; @@ -710,12 +708,17 @@ static int mipi_csis_clk_get(struct mipi_csis_device *csis) if (ret < 0) return ret; - /* Set clock rate */ - ret = clk_set_rate(csis->clks[MIPI_CSIS_CLK_WRAP].clk, - csis->clk_frequency); - if (ret < 0) - dev_err(csis->dev, "set rate=%d failed: %d\n", - csis->clk_frequency, ret); + if (csis->clk_frequency) { + /* + * Set the clock rate. This is deprecated, for backward + * compatibility with old device trees. + */ + ret = clk_set_rate(csis->clks[MIPI_CSIS_CLK_WRAP].clk, + csis->clk_frequency); + if (ret < 0) + dev_err(csis->dev, "set rate=%d failed: %d\n", + csis->clk_frequency, ret); + } return ret; } @@ -1419,9 +1422,7 @@ static int mipi_csis_parse_dt(struct mipi_csis_device *csis) { struct device_node *node = csis->dev->of_node; - if (of_property_read_u32(node, "clock-frequency", - &csis->clk_frequency)) - csis->clk_frequency = DEFAULT_SCLK_CSIS_FREQ; + of_property_read_u32(node, "clock-frequency", &csis->clk_frequency); return 0; }