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[0/8] mmc: sdhci-pxav2: Add support for PXA168

Message ID 20221128024407.224393-1-doug@schmorgal.com
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Series mmc: sdhci-pxav2: Add support for PXA168 | expand

Message

Doug Brown Nov. 28, 2022, 2:43 a.m. UTC 
This is a revival of an earlier patch series from 2013 to add support
for the PXA168 SDHC controller, with an additional SDIO IRQ errata fix.
It also cleans up the clock naming to be consistent with the existing DT
schema shared with the pxav3 driver (in a backwards-compatible way).

Here is the original patch series this is based on:
https://lore.kernel.org/linux-mmc/1363544206-3671-1-git-send-email-tanmay.upadhyay@einfochips.com/

Note that I left out the platform_specific_completion and clock gating
changes from the original patches. They both seemed controversial, and
don't seem necessary based on my testing. I've been running this code on
a PXA168 for months without any issues.

The SDIO IRQ workaround of sending a dummy CMD0 isn't pretty, but it
works just as the errata said it would. Should I export sdhci_post_req
and refer to it directly, rather than saving a pointer to it in this
driver like I'm doing now? Or is there a cleaner way to send the dummy
command after every SDIO command? It felt hacky, but I wasn't sure how
else to do it.

Doug Brown (8):
  mmc: sdhci-pxav2: add initial support for PXA168 V1 controller
  mmc: sdhci-pxav2: enable CONFIG_MMC_SDHCI_IO_ACCESSORS
  mmc: sdhci-pxav2: add register workaround for PXA168 silicon bug
  mmc: sdhci-pxav2: change clock name to match DT bindings
  mmc: sdhci-pxav2: add optional core clock
  mmc: sdhci-pxav2: add SDIO card IRQ workaround for PXA168 V1
    controller
  mmc: sdhci-pxav2: add optional pinctrl for SDIO IRQ workaround
  dt-bindings: mmc: sdhci-pxa: add pxav1

 .../devicetree/bindings/mmc/sdhci-pxa.yaml    |  22 ++-
 drivers/mmc/host/Kconfig                      |   1 +
 drivers/mmc/host/sdhci-pxav2.c                | 138 +++++++++++++++++-
 3 files changed, 154 insertions(+), 7 deletions(-)