Message ID | 20230116194401.20372-1-doug@schmorgal.com |
---|---|
Headers | show |
Series | mmc: sdhci-pxav2: Add support for PXA168 | expand |
On 16/01/23 21:43, Doug Brown wrote: > Add ability to have an optional core clock just like the pxav3 driver. > The PXA168 needs this because its SDHC controllers have separate core > and io clocks that both need to be enabled. This also correctly matches > the documented devicetree bindings for this driver. > > Reported-by: kernel test robot <lkp@intel.com> > Reported-by: Dan Carpenter <error27@gmail.com> > Signed-off-by: Doug Brown <doug@schmorgal.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > The Reported-by tags above refer to a missing assignment to ret in an > earlier version of this patch. The kernel test robot caught it. > > drivers/mmc/host/sdhci-pxav2.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c > index f5c86e1ba734..3141901e1558 100644 > --- a/drivers/mmc/host/sdhci-pxav2.c > +++ b/drivers/mmc/host/sdhci-pxav2.c > @@ -191,7 +191,7 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) > const struct sdhci_pxa_variant *variant; > > int ret; > - struct clk *clk; > + struct clk *clk, *clk_core; > > host = sdhci_pltfm_init(pdev, NULL, 0); > if (IS_ERR(host)) > @@ -214,6 +214,13 @@ static int sdhci_pxav2_probe(struct platform_device *pdev) > goto free; > } > > + clk_core = devm_clk_get_optional_enabled(dev, "core"); > + if (IS_ERR(clk_core)) { > + ret = PTR_ERR(clk_core); > + dev_err_probe(dev, ret, "failed to enable core clock\n"); > + goto disable_clk; > + } > + > host->quirks = SDHCI_QUIRK_BROKEN_ADMA > | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL > | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
On Mon, 16 Jan 2023 at 20:44, Doug Brown <doug@schmorgal.com> wrote: > > This is a revival of an earlier patch series from 2013 to add support > for the PXA168 SDHC controller, with an additional SDIO IRQ errata fix. > It also cleans up the clock naming to be consistent with the existing DT > schema shared with the pxav3 driver (in a backwards-compatible way). > > Here is the original patch series this is based on: > https://lore.kernel.org/linux-mmc/1363544206-3671-1-git-send-email-tanmay.upadhyay@einfochips.com/ > > Note that I left out the platform_specific_completion and clock gating > changes from the original patches. They both seemed controversial, and > don't seem necessary based on my testing. I've been running this code on > a PXA168 for months without any issues. > > Changes in v5: > - Fix missing assignment to ret in core clock patch found by test robot > > Changes in v4: > - Rebase on latest mmc/next to fix conflict with DT binding > > Changes in v3: > - Use OF match data rather than of_match_device and of_device_is_compatible > - Simplify some instances of pdev->dev that could have just been "dev" > - Handle EPROBE_DEFER when getting the clock > - Use devm_clk_get_optional_enabled for the core clock (it's simpler) > - Clear sdio_mrq before calling mmc_request_done > - Small tweaks to devicetree binding requested by Krzysztof > > Changes in v2: > - Fix mistakes in devicetree binding > - Use cleaner code for pxav1_readw suggested by Adrian > - Switch to request_done() and irq() for SDIO workaround CMD0 handling > > Doug Brown (8): > mmc: sdhci-pxav2: add initial support for PXA168 V1 controller > mmc: sdhci-pxav2: enable CONFIG_MMC_SDHCI_IO_ACCESSORS > mmc: sdhci-pxav2: add register workaround for PXA168 silicon bug > mmc: sdhci-pxav2: change clock name to match DT bindings > mmc: sdhci-pxav2: add optional core clock > mmc: sdhci-pxav2: add SDIO card IRQ workaround for PXA168 V1 > controller > mmc: sdhci-pxav2: add optional pinctrl for SDIO IRQ workaround > dt-bindings: mmc: sdhci-pxa: add pxav1 > > .../devicetree/bindings/mmc/sdhci-pxa.yaml | 19 ++- > drivers/mmc/host/Kconfig | 1 + > drivers/mmc/host/sdhci-pxav2.c | 154 ++++++++++++++++-- > 3 files changed, 160 insertions(+), 14 deletions(-) > Applied for next, thanks! Kind regards Uffe