| Message ID | 20220912132337.18159-2-pshete@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show
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From: Prathamesh Shete <pshete@nvidia.com>
To: <adrian.hunter@intel.com>, <ulf.hansson@linaro.org>,
<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
<p.zabel@pengutronix.de>, <linux-mmc@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
CC: <anrao@nvidia.com>, <smangipudi@nvidia.com>, <pshete@nvidia.com>
Subject: [PATCH 2/2] mmc: sdhci-tegra: Use actual clock rate for SW tuning
correction
Date: Mon, 12 Sep 2022 18:53:37 +0530
Message-ID: <20220912132337.18159-2-pshete@nvidia.com>
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|
| Series |
[1/2] mmc: sdhci-tegra: Separate T19x and T23x SoC data
|
expand
|
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 136c045d8f01..3a3d188e8c65 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -773,7 +773,7 @@ static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) dev_err(dev, "failed to set clk rate to %luHz: %d\n", host_clk, err); - tegra_host->curr_clk_rate = host_clk; + tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk); if (tegra_host->ddr_signaling) host->max_clk = host_clk; else
Ensure tegra_host member "curr_clk_rate" holds the actual clock rate instead of requested clock rate for proper use during tuning correction algorithm. Fixes: ea8fc5953e8b ("mmc: tegra: update hw tuning process") Signed-off-by: Aniruddha TVS Rao <anrao@nvidia.com> Signed-off-by: Prathamesh Shete <pshete@nvidia.com> --- drivers/mmc/host/sdhci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)