From patchwork Fri Dec 22 06:22:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mengqi Zhang X-Patchwork-Id: 757744 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 922D88F40; Fri, 22 Dec 2023 06:22:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="uAlROctz" X-UUID: 854caeb6a09211eeba30773df0976c77-20231222 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=3CfXjXK+ifyxmF7/x1t1E1bQ/x/4s3uHJnnqwy/VaAM=; b=uAlROctzkydn8hC38n5GO5+RLgEqs+x6W5c7fPpc1+uLHIkTmv5zOlBaRIA4A1r+7jvfl7wMW2HOWls8EAZ+w5Ym/czxCPIyBygf7ZgwHjWZy/lYTt8Bt1DYdkugXAxewPI7tDoV/1Hjo5enttWauoLdzlheUKO/YwXOnBi58kA=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35, REQID:f77f7735-583a-44d3-954c-e5a6ad2bd3c8, IP:0, U RL:0,TC:0,Content:-5,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-35 X-CID-META: VersionHash:5d391d7, CLOUDID:21f85e2e-1ab8-4133-9780-81938111c800, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,D KR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_ULS,TF_CID_SPAM_SNR X-UUID: 854caeb6a09211eeba30773df0976c77-20231222 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 632133387; Fri, 22 Dec 2023 14:22:45 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Fri, 22 Dec 2023 14:22:44 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Fri, 22 Dec 2023 14:22:43 +0800 From: Mengqi Zhang To: , , , , CC: , , , , , , , Subject: [PATCH v2 1/1] mmc: core: Add HS400 tuning in HS400es initialization Date: Fri, 22 Dec 2023 14:22:36 +0800 Message-ID: <20231222062236.26370-1-mengqi.zhang@mediatek.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 During the initialization to HS400es stage, add hs400 tuning flow as an optional process. For Mediatek IP, HS00es mode requires a specific tuning to ensure the correct HS400 timing setting. Signed-off-by: Mengqi Zhang --- the previous patch link: https://patchwork.kernel.org/project/linux-mediatek/patch/20231201030547.11553-1-mengqi.zhang@mediatek.com/ --- drivers/mmc/core/mmc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 705942edacc6..9760eea2c104 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -1823,7 +1823,15 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, if (err) goto free_card; - } else if (!mmc_card_hs400es(card)) { + } else if (mmc_card_hs400es(card)) { + if (host->ops->execute_hs400_tuning) { + mmc_retune_disable(host); + err = host->ops->execute_hs400_tuning(host, card); + mmc_retune_enable(host); + if (err) + goto free_card; + } + } else { /* Select the desired bus width optionally */ err = mmc_select_bus_width(card); if (err > 0 && mmc_card_hs(card)) {